Cascode Op-Amp Input Bias Current Cancellation Without Trimming

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Solution Overview

Problem

Operational amplifiers (op-amps) face challenges in effectively canceling input bias current, which is undesirable in certain applications, and existing solutions often require trimming or replica circuits for accurate cancellation.

Innovation Solution

The implementation of bipolar cascode transistors and current mirror circuits that sense and mirror the base currents of cascode transistors to subtract from the input bias currents, providing accurate cancellation without the need for trimming or replica circuits, and compensating for errors such as collector-emitter voltage mismatch and finite current gain.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If traditional input bias current cancellation methods are used, then some level of bias current compensation is achieved, but trimming or replica circuits are required which increase device complexity and manufacturing difficulty

Engineering Contradiction:
Improvebias current cancellation accuracyVSAvoidcircuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The amplifier input stage automatically compensates for its own input bias current by utilizing the base currents of the cascode transistors. The current mirror circuits sense the base currents and generate compensating currents that are subtracted from the input bias currents, eliminating the need for external trimming or replica circuits while achieving accurate cancellation

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

Cascode transistors are introduced as intermediary elements between the input transistors and the load. These cascode transistors serve dual purposes: they provide the base current that is sensed and mirrored for compensation, and they maintain the collector-emitter voltage of the input transistors, thereby enabling accurate bias current cancellation without requiring direct access to the input transistor base currents

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If trimming is used to achieve accurate bias current cancellation, then cancellation precision is improved, but manufacturing complexity and cost increase

Engineering Contradiction:
Improvebias current cancellation accuracyVSAvoidmanufacturing simplicity
Core Design Contradiction:
Measurement precisionVSEase of manufacture

Solution Approach 1:

The circuit performs automatic self-compensation of input bias current through inherent circuit mechanisms. The current mirrors automatically sense and replicate the base currents, generating compensating currents that are subtracted from the input bias currents, eliminating the need for manual or automated trimming processes while maintaining high cancellation accuracy

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The trimming function is completely removed from the design. Instead of requiring external trimming components or processes, the bias current cancellation is achieved through the intrinsic operation of the cascode transistors and current mirror circuits, simplifying manufacturing while maintaining precision

Inventive Principle:
Principle #2Taking out (Extraction)

3Measurement precision

If replica circuits are used for bias current cancellation, then cancellation accuracy is improved, but device complexity and area increase

Engineering Contradiction:
Improvebias current cancellation accuracyVSAvoidcircuit area
Core Design Contradiction:
Measurement precisionVSArea of stationary object

Solution Approach 1:

The cascode transistors perform multiple functions: they provide the base current for sensing and compensation, they maintain the collector-emitter voltage of the input transistors, and they enable the current mirror operation. This multi-functionality eliminates the need for separate replica circuits, reducing overall circuit area while maintaining cancellation accuracy

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The bias current cancellation function is merged with the existing cascode structure and current mirror circuits. The same transistors and circuits that provide voltage gain and current amplification also perform the bias current sensing and compensation, eliminating the need for additional dedicated cancellation circuits and reducing total circuit area

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach achieves up to a 100× reduction in input bias current without manufacturing trimming, ensuring accurate and efficient bias current cancellation in operational amplifiers.

Implementation Method 1

current mirror circuits that sense and mirror the base currents of cascode transistors to subtract from the input bias currents

Methodology Applied
Scientific EffectCurrent mirror effect:

Data Source

PatentUS11539337B2Amplifier with input bias current cancellation
Publication Date: 2022.12.27 TEXAS INSTRUMENTS INC
  • US11539337B2 patent drawing
  • US11539337B2 patent drawing
  • US11539337B2 patent drawing

AI summary

An amplifier includes a first input transistor, a second input transistor, a first cascode transistor, a second cascode transistor, a first current mirror circuit, and a second current mirror circuit. The first input transistor is coupled to a first input terminal. The second input transistor is coupled to a second input terminal and the first input transistor. The first cascode transistor is coupled to the first input transistor. The second cascode transistor is coupled to the second input transistor and the first cascode transistor. The first current mirror circuit is coupled to the first cascode transistor, the second cascode transistor, and the first input terminal. The second current mirror circuit is coupled to the first cascode transistor, the second cascode transistor, and the second input terminal.