Cascode Bias Circuit for Accurate Low-Headroom Current Mirrors
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Solution Overview
Problem
Current mirror accuracy is compromised due to non-equal drain-to-source voltages across diode-connected and current source transistors, resulting from channel-length modulation.
Innovation Solution
A cascode bias circuit is introduced, featuring a first current source, a second current source, and transistors configured to ensure equal drain-to-source voltages across the diode-connected and current source transistors, thereby maintaining accurate current mirroring.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a simple current mirror configuration is used, then device complexity is reduced, but current mirror accuracy deteriorates due to non-equal drain-to-source voltages causing channel-length modulation
Solution Approach 1:
The patent introduces a cascode transistor as an intermediary element between the diode-connected transistor and the current source transistor. This cascode transistor acts as a mediator that equalizes the drain-to-source voltages across the transistors, thereby eliminating channel-length modulation effects and improving current mirror accuracy without requiring complex biasing circuits
Solution Approach 2:
The patent changes the voltage parameters by introducing a specific bias voltage to the cascode transistor gate. This voltage is carefully selected to ensure that the drain-to-source voltages of the diode-connected transistor and current source transistor are equalized, thereby compensating for channel-length modulation and improving current copying accuracy
2Measurement precision
If cascode transistors are added to equalize drain-to-source voltages, then current mirror accuracy is improved, but device complexity increases
Solution Approach 1:
The cascode transistor serves as a simple intermediary element that directly addresses the voltage inequality problem. By placing this single transistor in the circuit with appropriate biasing, the patent achieves voltage equalization and accuracy improvement without introducing complex multi-transistor biasing networks or additional control circuits
Data Source
AI summary
A cascode bias circuit biases a gate of a cascode transistor in a cascode current mirror. The cascode bias circuit includes a first transistor configured to conduct a first current and includes a second transistor configured to conduct a second current. The first and second transistors couple to a third transistor configured to conduct a sum of the first current and the second current. A gate of the first transistor couples to a gate of the cascode transistor to bias the cascode transistor.