Cascode Amplifier Bias Switching for Higher IP3 Across Gain States
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Solution Overview
Problem
Existing radio frequency (RF) amplifiers, particularly low noise amplifiers (LNAs), face challenges in optimizing the third-order intercept point (IP3) due to increased complexity from adjustable/switchable elements required for different gain-states, leading to non-linearity and distortion, which limits data rate and signal demodulation accuracy.
Innovation Solution
A multi-gain-state amplifier circuit with a stack of transistors, where drain-to-source voltages of input and output transistors are controlled through gate voltage adjustments to optimize IP3, reducing non-linearity by increasing the drain-to-source voltage of the input transistor in low gain-states and the output transistor in high gain-states.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If adjustable/switchable elements are added to optimize IP3 for different gain-states, then amplifier performance is improved, but device complexity increases
Solution Approach 1:
The patent changes the bias parameters (gate-source voltages) of the stacked transistors to optimize IP3 for different gain-states. By adjusting Vgs1 and Vgs2 of the input and cascode transistors respectively, the amplifier achieves optimal third-order intercept point performance without adding adjustable/switchable elements, thus resolving the contradiction between performance improvement and complexity increase.
2Object-generated harmful factors
If drain-to-source voltage of input transistor is increased in low gain-states, then non-linearity is reduced, but power consumption increases
Solution Approach 1:
The patent applies local quality by differentiating the bias optimization strategy between different gain-states. In low gain-states, the drain-to-source voltage of the input transistor is increased to reduce non-linearity, while in high gain-states, the focus shifts to the output transistor. This localized approach optimizes non-linearity reduction where needed without uniformly increasing power consumption across all operating conditions.
3Object-generated harmful factors
If drain-to-source voltage of output transistor is increased in high gain-states, then non-linearity is reduced, but headroom requirements increase
Solution Approach 1:
The patent implements dynamics by making the bias configuration adaptive to different gain-states. The gate-source voltages Vgs1 and Vgs2 are dynamically adjusted based on the operating gain-state, allowing the amplifier to optimize non-linearity reduction by increasing drain-to-source voltage of the output transistor in high gain-states while maintaining proper headroom management. This dynamic adaptation resolves the contradiction between non-linearity reduction and headroom requirements.
Data Source
AI summary
Methods and devices for amplifying an input RF signal according to at least two gain-states is described. According to one aspect, a multi gain amplifier circuit including a low noise amplifier having a stack of transistors is used for amplification of the input RF signal. When switching from a low gain-state to a high gain-state, the drain-to-source voltage of the output transistor of the stack is increased to affect region of operation of the output transistor, and thereby reduce non-linearity at the output of the amplifier. When switching from the high gain-state to the low gain-state, the drain-to-source voltage of the input transistor of the stack is increased to affect region of operation of the input transistor, and thereby reduce non-linearity at the output of the amplifier.