Cascode Current Mirror With Back-Gate Bias
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current mirror devices in analog integrated circuits face challenges in balancing output resistance, input headroom, and output headroom across different configurations, with existing solutions either sacrificing these parameters or requiring additional biasing currents.
Innovation Solution
A current mirror device configuration utilizing a stacked cascode structure with back-gate biased field-effect transistors operating in saturation mode, which maintains high output resistance without sacrificing input and output headroom, and eliminates the need for additional biasing current branches.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a cascode configuration is used for current mirror, then output resistance is appreciably higher, but input headroom and output headroom are sacrificed
Solution Approach 1:
The patent applies parameter changes by utilizing back-gate biasing to dynamically adjust the threshold voltage of the transistors. By changing the electrical parameter (threshold voltage) through back-gate control, the circuit achieves high output resistance comparable to swing-enhanced cascode while maintaining adequate headroom, thus resolving the contradiction between output resistance and headroom requirements
2Ease of operation
If swing-enhanced cascode configuration is used, then output resistance, input headroom, and output headroom are improved, but an additional branch of biasing current is required
Solution Approach 1:
The patent extracts and eliminates the additional biasing current branch from the swing-enhanced cascode configuration. By using back-gate biasing instead of an extra current branch, the invention removes the complexity element while retaining the performance benefits of high output resistance and adequate headroom
Solution Approach 2:
The back-gate biasing mechanism serves multiple functions: it adjusts threshold voltage to maintain saturation mode operation, provides the necessary voltage control for high output resistance, and eliminates the need for separate biasing current branches. This multi-functionality resolves the contradiction by achieving swing-enhanced performance without additional complexity
3Device complexity
If self-biased swing-enhanced cascode configuration is used, then additional biasing current branch is eliminated, but input headroom is sacrificed due to resistor at input node
Solution Approach 1:
The patent changes the control parameter from input node voltage (which would require a resistor and sacrifice headroom) to back-gate voltage. By applying bias voltage to the back gate instead of using a resistor at the input node, the invention eliminates the need for additional biasing branches while preserving input headroom, thus resolving this contradiction
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed configuration achieves improved output resistance comparable to swing-enhanced cascode configurations without increasing chip area or power consumption, while maintaining input and output headroom, and allows for flexible threshold voltage adjustments.
Implementation Method 1
A voltage source is coupled to the back gate of the first transistor and to the back gate of the second transistor. The voltage source is configured to supply a bias voltage to the back gate of the first transistor that adjusts a threshold voltage of the first transistor and to the back gate of the second transistor that adjusts a threshold voltage of the second transistor.
Data Source
AI summary
Current mirror devices and methods for operating a current mirror device. The current mirror device includes a first transistor having a gate, a source, a drain, and a back gate. The drain and the gate of the first transistor are coupled to an input node of the current mirror device. The current mirror device further includes a second transistor having a gate, a source, a drain, and a back gate. The drain of the second transistor is coupled to an output node of the current mirror device, and the gate of the second transistor is coupled to the gate of the first transistor and to the input node. A voltage source supplies a bias voltage to the back gate of the first transistor that adjusts a threshold voltage of the first transistor and to the back gate of the second transistor that adjusts a threshold voltage of the second transistor.