Cascode Semiconductor Device Clip Bond Lead Connections
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Solution Overview
Problem
Cascode transistor arrangements face challenges with DC power and switching losses due to inductance effects in wire-bonded connections, leading to gate bounce and increased device resistances, particularly at high voltage operations, and require complex manufacturing processes with large package sizes.
Innovation Solution
A discrete cascode semiconductor device configuration where high voltage and low voltage transistor dies are connected using clip bond lead connections, eliminating the need for a dedicated die pad or lead frame, and a carrier with an insulating core between metal layers provides mechanical and thermal support, reducing parasitic inductances and capacitances.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If wire-bonded connections are used to connect high voltage and low voltage transistor dies, then the device can be assembled with conventional techniques, but parasitic inductances and capacitances increase causing DC power losses, switching losses, and gate bounce
Solution Approach 1:
The patent extracts and eliminates the wire bonds from the cascode device structure. Instead of using wire bonds to connect the high voltage and low voltage transistor dies, the invention directly couples the drain of the low voltage device to the source of the high voltage device, removing the source of parasitic inductance and capacitance that cause power losses
Solution Approach 2:
The patent merges the electrical connection function with the mechanical support structure. The common source connection serves both as the electrical connection between devices and as the mechanical support for mounting the transistor dies, eliminating the need for separate wire bonds and reducing parasitic elements
2Ease of manufacture
If wire bonds are used for connecting transistor terminals, then conventional assembly methods can be employed, but device resistances increase and wire connections become subject to failure at high voltage operations
Solution Approach 1:
The invention removes wire bonds from the device structure entirely, replacing them with direct die-to-die coupling. This extraction eliminates the reliability issues associated with wire bonds at high voltage, including increased device resistances and connection failures
Solution Approach 2:
The patent introduces a common source connection structure that acts as an intermediary between the low voltage and high voltage transistor dies. This mediator provides a stable, low-inductance electrical connection that is more reliable than wire bonds under high voltage operating conditions
3Strength
If a dedicated die pad and lead frame are used to support transistor dies, then mechanical support is provided, but device complexity and package size increase
Solution Approach 1:
The patent makes the common source connection multi-functional by using it both as the electrical connection between transistor terminals and as the mechanical support structure for mounting the dies. This eliminates the need for separate dedicated die pads and lead frames, reducing package complexity
Solution Approach 2:
The invention merges the electrical connection function and mechanical support function into a single common source connection structure. Instead of having separate components for electrical connection and mechanical support, both functions are integrated into one element, simplifying the overall device architecture
Data Source
AI summary
This disclosure relates to a discrete cascode semiconductor device and associated method of manufacture, the device includes: a high voltage depletion mode device die having gate, source and drain terminals arranged on a first major surface thereof; a low voltage enhancement mode device die having a gate and a source terminal formed on a first major surface thereof, and a drain terminal formed on a second major surface opposite the first major surface. The drain terminal of the high voltage device die is mounted on a drain connection; the source terminal of the low voltage device die and the gate terminal of the high voltage device are mounted on a common source connection; and the drain terminal of the low voltage device die is mounted on the source terminal of the high voltage device.


