Cascode FET Bias Circuit for Variable Drain Supply Stability
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Solution Overview
Problem
Existing RF transistor amplifiers with cascode configurations face challenges in varying power levels due to large voltage variations in the current mirror bias network, leading to stress on components.
Innovation Solution
A bias circuit with three follower networks is introduced to generate a reference current independent of the supply voltage, reducing voltage variation and stress on components by using a first follower network to adjust voltage, a second network for voltage-level shift, and a third network to buffer against sink and source currents.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the positive voltage supply is varied to switch between lower power and higher power applications, then the power output of the RF amplifier is improved, but the current mirror bias network components are subjected to large variation in voltage causing stress and potential malfunction
Solution Approach 1:
The patent introduces a buffer circuit as an intermediary between the variable positive voltage supply and the current mirror bias network. This buffer circuit decouples the bias network from direct exposure to large voltage variations, allowing the amplifier to vary power output while the bias network operates with stabilized voltage, thus resolving the contradiction between adaptability and reliability
Solution Approach 2:
The buffer circuit creates an equipotential condition for the current mirror bias network by maintaining a relatively constant voltage level despite variations in the positive supply voltage. This allows the bias network components to operate under stable potential conditions while the amplifier can still switch between different power levels through controlled current adjustment
2Device complexity
If the current mirror bias network is directly connected to the variable voltage supply, then the circuit complexity is reduced, but the bias voltage becomes unstable under large voltage variations
Solution Approach 1:
A buffer circuit is inserted as an intermediary between the variable voltage supply and the current mirror bias network. This additional component increases circuit complexity slightly but provides essential voltage stabilization, ensuring reliable bias conditions across varying power levels by isolating the bias network from direct voltage fluctuations
Data Source
AI summary
A circuit includes a bias circuit configured to be coupled to a cascode field effect transistor (FET) amplifier. The bias circuit is configured to receive a variable supply voltage, to generate a reference current independent of the variable supply voltage, and to mirror the reference current as a copy current in the cascode FET amplifier. The bias circuit includes a first follower network, a second follower network, and a third follower network. The first follower network is configured to receive the variable supply voltage and to generate an adjusted voltage less than the variable supply voltage for the bias circuit. The second follower network is coupled to the first follower network and is configured to provide a voltage-level shift based on the adjusted voltage. The third follower network is coupled to the second follower network and is configured to buffer the second follower network against a sink current from and a source current to the cascode FET amplifier.