Cascode Amplifier Bias Control Across Gain States for Higher IP3
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Solution Overview
Problem
Existing RF amplifiers, particularly cascode amplifiers, face challenges in optimizing the third-order intercept point (IP3) across different gain-states due to increased complexity and non-linearity contributions from input and output transistors, which affects signal amplification and data rate in wireless communication systems.
Innovation Solution
The solution involves controlling the drain-to-source voltage of input and output transistors in a cascode amplifier by adjusting the gate voltage, specifically increasing the drain-to-source voltage of the input transistor in low gain-states and the output transistor in high gain-states, to optimize IP3 without requiring adjustable/switchable elements, thereby simplifying the design and reducing non-linearity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If adjustable/switchable elements are used to optimize IP3 in different gain-states, then IP3 optimization is achieved, but device complexity increases
Solution Approach 1:
The patent changes the operating parameters (drain-to-source voltage) of existing transistors based on the gain-state to optimize IP3. In low gain-state, the input transistor is biased for optimal IP3, while in high gain-state, the output transistor is biased for optimal IP3. This parameter-based approach avoids adding adjustable/switchable elements and maintains a simple amplifier structure.
2Manufacturing precision
If non-linearity contributions from input and output transistors are reduced, then IP3 is optimized, but gain control flexibility is limited
Solution Approach 1:
The patent dynamically adjusts the biasing conditions of transistors based on the operating gain-state. The system transitions between different biasing configurations: in low gain-state, the input transistor is optimized for linearity, while in high gain-state, the output transistor is optimized for linearity. This dynamic adaptation allows the system to maintain optimal linearity across different gain-states without sacrificing gain control flexibility.
3Manufacturing precision
If drain-to-source voltage of input transistor is increased in low gain-state, then IP3 is optimized, but power consumption increases
Solution Approach 1:
The patent dynamically adjusts the drain-to-source voltage of the input transistor based on the gain-state. In low gain-state, the input transistor's drain-to-source voltage is increased to optimize IP3, while in high gain-state, this voltage is reduced. This dynamic voltage adjustment ensures optimal linearity only when needed, thereby reducing overall power consumption compared to maintaining high voltage continuously.
Data Source
AI summary
Methods and devices for amplifying an input RF signal according to at least two gain-states is described. According to one aspect, a multi gain amplifier circuit including a low noise amplifier having a stack of transistors is used for amplification of the input RF signal. When switching from a low gain-state to a high gain-state, the drain-to-source voltage of the output transistor of the stack is increased to affect region of operation of the output transistor, and thereby reduce non-linearity at the output of the amplifier. When switching from the high gain-state to the low gain-state, the drain-to-source voltage of the input transistor of the stack is increased to affect region of operation of the input transistor, and thereby reduce non-linearity at the output of the amplifier.