Cascode GaN-SiC Semiconductor Device for Threshold Stability

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Solution Overview

Problem

Semiconductor devices using GaN or SiC face issues with light-induced defects in the gate insulating film, leading to fluctuations in gate threshold voltage due to light generated inside the IGBT, causing charge trapping and conductivity modulation problems.

Innovation Solution

A semiconductor device comprising a normally-ON static induction thyristor and a normally-OFF semiconductor element, such as a MOSFET or IGBT, connected in cascode configuration, where the normally-ON element lacks a gate insulating film, and the normally-OFF element includes a gate insulating film, with the use of GaN or SiC semiconductor layers to achieve higher withstand voltage and prevent light-induced defects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a gate insulating film is provided in the normally-ON semiconductor element, then the device structure is more complete, but light generated inside the device causes defects in the gate insulating film and charge trapping, leading to gate threshold voltage fluctuation

Engineering Contradiction:
Improvegate threshold voltage stabilityVSAvoidlight-induced defects in gate insulating film
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent removes the gate insulating film from the normally-ON semiconductor element (static induction thyristor), extracting the problematic component that is affected by light-induced defects. This eliminates the gate insulating film from the region where light generation occurs, preventing charge trapping and threshold voltage fluctuation while maintaining device functionality through conductivity modulation in the semiconductor layer.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent applies different structural configurations to different parts of the device: the normally-OFF semiconductor element retains a gate insulating film for proper MOSFET/IGBT operation, while the normally-ON semiconductor element operates without a gate insulating film to avoid light-induced defects. This local differentiation allows each section to be optimized for its specific function and operational characteristics.

Inventive Principle:
Principle #3Local quality

2Reliability

If GaN or SiC is used for high withstand voltage, then power conversion efficiency is improved, but light with energy close to bandgap energy is generated inside the device, causing defects and charge trapping

Engineering Contradiction:
Improvewithstand voltage capabilityVSAvoidlight generation inside the device
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent acknowledges that light generation is an inherent property of GaN/SiC materials with high breakdown voltage, but converts this potential harm into a beneficial design criterion: the normally-ON element is specifically designed without a gate insulating film in the light-generation region, transforming the material's optical properties from a problem into a guide for structural optimization.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

3Ease of operation

If a cascode connection with normally-OFF element is used, then ON/OFF control is improved, but the device complexity increases

Engineering Contradiction:
ImproveON/OFF state controlVSAvoidsemiconductor element configuration
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The patent merges the normally-ON static induction thyristor and normally-OFF MOSFET/IGBT into a single integrated cascode structure, combining their complementary characteristics. The Si-based MOSFET/IGBT provides excellent ON/OFF control with low gate charge, while the GaN/SiC static induction thyristor provides high withstand voltage capability, creating a unified device that leverages the strengths of both technologies.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution enables a semiconductor device with higher withstand voltage and reduced light emission effects on the gate insulating film, preventing deterioration of element characteristics and allowing for efficient ON/OFF state control without material wastage, thus conserving chip size and material.

Implementation Method 1

The first semiconductor layer may be capable of conductivity modulation

Methodology Applied
Scientific EffectConductivity modulation:

Implementation Method 2

In the IGBT using GaN or SiC, light having an energy of approximately 3 [eV], which is close to the bandgap energy of GaN or SiC, is generated inside the IGBT

Methodology Applied
Scientific EffectLight generation: Electroluminescence

Implementation Method 3

there is a problem that this light with an energy of approximately 3 [eV] causes the charge trapped at a deep level in the gate insulating film to become excited and move to the channel region, thereby causing the gate threshold voltage to fluctuate from the predetermined value

Methodology Applied
Scientific EffectCharge trapping:

Data Source

PatentUS9806068B2Semiconductor device
Publication Date: 2017.10.31 FUJI ELECTRIC CO LTD
  • US9806068B2 patent drawing
  • US9806068B2 patent drawing
  • US9806068B2 patent drawing

AI summary

Inside an IGBT using GaN or SiC, light having an energy of approximately 3 [eV] is generated. Therefore, defects are caused in the gate insulating film of the IGBT. Furthermore, the charge trapped at a deep level becomes excited and moves to the channel region, thereby causing the gate threshold voltage to fluctuate from the predetermined value. Provided is a semiconductor device including a normally-ON semiconductor element that includes a first semiconductor layer capable of conductivity modulation and a first gate electrode, but does not include a gate insulating film between the first gate electrode and the first semiconductor layer; and a normally-OFF semiconductor element that includes a second semiconductor layer, a second gate electrode, and a gate insulating film between the second semiconductor layer and the second gate electrode. The normally-ON semiconductor element and the normally-OFF semiconductor element are connected in series.