Cascode Switch Gate Biasing for Lower ON-Resistance
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Solution Overview
Problem
Cascode switches in power conversion systems face challenges in achieving low ON-state resistance and high saturation current capability without increasing die size and cost.
Innovation Solution
A cascode switching circuit comprising a JFET and MOSFET in a cascode topology, with a gate driver, current source, voltage clamp, and optional capacitor and resistor configurations, to manage gate biasing and switching, thereby reducing ON-state resistance and increasing surge current capability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the ON-state resistance of a cascode switch is reduced for a given application, then power loss and heat generation are limited, but die size and cost increase
Solution Approach 1:
The patent applies parameter changes by forward-biasing the gate-source junction of the JFET to reduce its ON-state resistance. By changing the biasing condition of the JFET gate-source junction from reverse-biased or zero-biased to forward-biased, the resistance in the ON-state is significantly reduced, thereby lowering power loss without requiring a larger die size. This parameter change enables the cascode switch to achieve lower conduction losses while maintaining the same physical footprint.
2Power
If the saturation current of a cascode switch is increased for a given application, then surge current capability is improved, but die size and cost increase
Solution Approach 1:
The patent utilizes parameter changes by adjusting the gate voltage of the JFET through forward biasing to enhance the saturation current capability. By applying a forward bias to the gate-source junction, the channel conductivity is improved, allowing the cascode switch to sustain higher saturation currents and surge currents without requiring an increase in die size. This enables the device to handle higher power applications within the same physical constraints.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces ON-state resistance and enhances surge current capability while maintaining a compact die size and cost efficiency.
Implementation Method 1
a current source coupled between the gate-driver output and the gate of the JFET and configured to forward bias a gate-source junction of the JFET when the cascode device is in an ON-state
Implementation Method 2
the voltage clamp comprises a Zener diode
Data Source
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AI summary
A cascode switching circuit is disclosed. The cascode switching circuit includes a cascode device comprising a JFET and a MOSFET coupled in a cascode topology. The cascode switching circuit further includes a gate driver having a gate-driver input configured to receive a switching input signal and a gate-driver output coupled to a gate of the MOSFET and configured to switch the MOSFET between a MOSFET ON-state and a MOSFET OFF-state based on the switching input signal. In addition, the cascode switching circuit includes a current source coupled between the gate-driver output and the gate of the JFET and configured to forward bias a gate-source junction of the JFET when the cascode device is in an ON-state.