Cascode Gate Driver Current Source for High-VGS Power FETs
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Solution Overview
Problem
Current high-voltage gate driver circuits for USB Power Delivery (PD) require additional high-voltage masks and costly 40-volt rated devices, leading to increased fabrication costs and limitations in driving power FETs with gate-source voltages greater than 5 volts.
Innovation Solution
A cascode current source with a cascode protection circuit using low-voltage devices, including a source follower and feedback voltage divider, to adaptively vary the gate voltage and prevent |VGS| violations, allowing the use of 30-volt VDS rated DEPMOS devices and avoiding the need for a 40-volt HV mask.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If 40-volt rated devices and high-voltage masks are used, then gate-source voltages greater than 5 volts can be driven, but fabrication costs increase
Solution Approach 1:
The patent changes the voltage rating parameter of the devices from 40-volt to 30-volt, and modifies the gate driver circuit topology to accommodate this parameter change. The cascode configuration allows the circuit to safely drive higher gate-source voltages while using lower-voltage-rated devices, thereby reducing fabrication costs without compromising the ability to drive power FETs with gate-source voltages greater than 5 volts.
Solution Approach 2:
The gate driver circuit is segmented into multiple stages (cascode configuration with upper and lower stages) that can independently handle voltage distribution. This segmentation allows each transistor stage to operate within its safe voltage limits while collectively achieving the required high gate-drive capability, eliminating the need for expensive 40-volt rated devices.
2Productivity
If standard cascode current source is used, then current can be supplied to gate, but current accuracy deteriorates during current limiting
Solution Approach 1:
The patent implements a feedback mechanism where the cascode protection circuit samples the voltage at the cascode node and adaptively varies the gate voltage of the lower stage. This feedback loop automatically detects overcurrent conditions and adjusts the operating point to maintain the lower stage in saturation, thereby preserving current accuracy during current limiting operations.
Solution Approach 2:
The gate driver circuit dynamically adjusts the operating state of the lower stage transistor between linear and saturation regions based on current conditions. During normal operation, the lower stage operates in the linear region for high current drive capability, while during overcurrent conditions, it automatically transitions to saturation to maintain current accuracy, providing adaptive performance.
Data Source
AI summary
A power supply system for USB Power Delivery includes a current source drive circuit to control a power FET to regulate the supply of power along a power path. The current source drive circuit includes a cascode current source and a cascode protection circuit formed by a source follower and a feedback voltage divider. The source follower can be a transistor with its gate connected to a cascode node between upper- and lower-stage transistors of the cascode current source. The divider node of the voltage divider is connected to the gate of the lower-stage transistor. The current source drive circuit can operate within the gate-source voltage specifications of 30-volt DEPMOS devices, and can provide high output impedance to the gate of power FET and a current limit circuit during current limiting operation, without requiring an extra high-voltage mask during fabrication.