Cascode HEMT Package Layout for Thermal Paths and Stable Gate Connection

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Solution Overview

Problem

Existing semiconductor packages face challenges in heat dissipation and power efficiency due to reliance on positional accuracy and tolerance for optimal coupling, which can impact coplanarity and thermal performance.

Innovation Solution

A cascode HEMT semiconductor device design featuring a lead frame with a die pad, HEMT and MOSFET dies, and multiple pillars connecting the MOSFET source to the HEMT gate through a conductive material, with an indentation to avoid direct contact and ensure stability and reliability, improving thermal and electrical performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple pillars are used to connect MOSFET source to HEMT gate, then reliability is improved, but device complexity increases

Engineering Contradiction:
Improveconnection reliabilityVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The connection between MOSFET source and HEMT gate is divided into multiple separate pillars instead of a single connection. This segmentation provides redundant pathways for electrical connection, so if one pillar fails, other pillars maintain the connection, thereby improving reliability without requiring a complete redesign of the connection architecture.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The design anticipates potential connection failures by pre-establishing multiple parallel connection paths through multiple pillars. This beforehand cushioning ensures that the system can tolerate individual pillar failures while maintaining functional integrity, effectively preparing for potential failures before they occur.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

2Reliability

If indentation is added to die pad to prevent direct contact, then reliability is improved, but manufacturing precision requirements increase

Engineering Contradiction:
Improveconnection stabilityVSAvoidalignment precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The indentation is pre-formed in the die pad during manufacturing, establishing a predetermined non-contact zone before the molding process. This preliminary action ensures that pillars are guided to connect through the indentation rather than making direct contact with the die pad, preventing short circuits while maintaining reliable electrical connections through the conductive material.

Inventive Principle:
Principle #10Preliminary action

3Temperature

If multiple heat dissipation paths are provided, then thermal performance is improved, but device complexity increases

Engineering Contradiction:
Improvethermal performanceVSAvoidpackage structure complexity
Core Design Contradiction:
TemperatureVSDevice complexity

Solution Approach 1:

The lead frame and die pad structure serves multiple functions simultaneously: it provides electrical connections through the pillar connections and acts as a heat dissipation pathway through its thermally conductive design. By making the connection structure multi-functional, the patent achieves both electrical connectivity and thermal management without adding separate dedicated components, thereby reducing overall device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enhances thermal performance by providing multiple heat dissipation paths and reduces parasitic inductance and resistance, ensuring reliability even if one pillar disconnects, and prevents open connections during the molding process.

Implementation Method 1

multiple pillars connecting the MOSFET source to the HEMT gate through a conductive material, with an indentation to avoid direct contact and ensure stability and reliability, improving thermal and electrical performance

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Implementation Method 2

provides multiple heat dissipation paths from both top and bottom surfaces of the package

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentEP3882969B1A cascode semiconductor device and method of manufacture
Publication Date: 2024.05.01 NEXPERIA BV
  • EP3882969B1 patent drawingFigure 1
  • EP3882969B1 patent drawingFigure 2
  • EP3882969B1 patent drawingFigure 3a~3c

AI summary

This disclosure relates to a cascode HEMT semiconductor device comprising a lead frame, a die pad attached to the lead frame, a HEMT die attached to the die pad, the HEMT die comprising a HEMT source and a HEMT drain on a first side, a HEMT gate on a second side, wherein the device further comprises a MOSFET die attached to the source of the HEMT die, the MOSFET die comprising a MOSFET source, a MOSFET gate and a MOSFET drain, wherein the MOSFET drain is connected to the HEMT source, wherein the MOSFET source comprises a MOSFET source clip, wherein the MOSFET source clip comprises a pillar so to connect the MOSFET source to the HEMT gate, wherein the connection between the MOSFET source to the HEMT gate is established by a conductive material.