Cascode Level Shifter With Adaptive Bias for MOS Gate Stress
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Solution Overview
Problem
MOS transistors in level shifter circuits of semiconductor memory devices face reduced operational life due to excessive stress from high gate-to-source and gate-to-drain voltage differences, leading to incorrect functioning.
Innovation Solution
A level shifter circuit design with a shifting circuit comprising series-connected electronic devices and a voltage dropper, along with a bias generator to manage voltage drops, ensures that transistors are subjected to lower gate-to-source and gate-to-drain voltage differences by using a cascode configuration of transistors as voltage reducers, and an adaptive bias voltage that tracks the column selection and deselection voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If MOS transistors are used in level shifter circuits to convert logical signals to high voltages, then the memory device can perform programming and erasing operations, but the transistors experience excessive gate-to-source and gate-to-drain voltage stress that shortens their operational life
Solution Approach 1:
The patent introduces an intermediary voltage dropper device (third transistor) between the high voltage supply and the gate of the column selector transistor. This intermediary component absorbs the excessive voltage stress, allowing the main transistor to operate at lower stress levels while still achieving the required high output voltage for memory cell programming and erasing operations.
Solution Approach 2:
The level shifter circuit is segmented into multiple transistor stages working in series. The first transistor handles the initial voltage transition, the second transistor provides additional voltage boosting, and the third transistor (voltage dropper) manages the final voltage level and stress distribution. This segmentation distributes the voltage stress across multiple components rather than concentrating it on a single transistor.
2Ease of operation
If high voltages are applied to column selector transistors to enable bit line selection and programming operations, then the memory device can write data, but the oxide gate experiences excessive stress that may cause breakdown
Solution Approach 1:
The voltage dropper transistor acts as a mediator that protects the oxide gate from excessive stress. By positioning this transistor in the signal path, it ensures that the gate-to-source and gate-to-drain voltage differences across the column selector transistor remain within safe limits, preventing oxide gate breakdown while still enabling high voltage operation for data writing.
Solution Approach 2:
The circuit design incorporates protective transistor structures and voltage dropper elements beforehand to cushion against excessive voltage stress before it can damage the oxide gate. This preventive approach ensures that even during high voltage programming operations, the transistor gates are protected from stress that would cause breakdown.
Data Source
AI summary
A level shifter circuit includes first and second supply inputs for receiving a first supply voltage and a second supply voltage, respectively. The level shifter circuit further comprises a shifting circuit configured to receive an input voltage and output a selected one of the first supply voltage and the second supply voltage according to the value of the input voltage. The shifting circuit includes a circuit branch connected between the first supply input and the second supply input. The circuit branch includes a plurality of series-connected electronic devices and a voltage dropper device connected in series with the plurality of electronic devices for introducing a voltage drop. The level shifter circuit includes a bias generator configured to generate a bias voltage for the voltage dropper device according to values of the first supply voltage and the second supply voltage, said voltage drop depending on the bias voltage.