Cascode MOSFET Biasing for Standby Leakage Reduction
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Solution Overview
Problem
Leakage current in transistors, such as MOSFETs, leads to undesired power consumption and performance degradation in electronic devices, particularly when in standby mode, due to gate-induced drain leakage (GIDL) and subthreshold leakage (ISUB), which existing technologies have not effectively mitigated.
Innovation Solution
Implementing a cascode arrangement with transistors having a high voltage threshold (Vth) and dynamically biasing the gate of the drain-side transistor with a control signal, reducing the voltage differential between the drain and gate/source to minimize leakage current during standby mode.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by stationary object
If transistors are used in standby mode, then the device can maintain operational readiness, but leakage current increases power consumption
Solution Approach 1:
The patent applies dynamics by making the transistor threshold voltage adjustable rather than fixed. A control voltage is applied to the bulk terminal of the transistor to dynamically increase its threshold voltage when in standby mode, thereby reducing leakage current. This dynamic adjustment allows the transistor to maintain low power consumption during standby while preserving the ability to switch to low-threshold mode when active operation is required, thus resolving the contradiction between power savings and operational readiness.
2Loss of energy
If high threshold voltage transistors are used, then leakage current is reduced, but switching speed decreases
Solution Approach 1:
The patent implements dynamic threshold voltage control where the transistor can switch between high and low threshold voltage states. During standby mode, a control voltage is applied to the bulk terminal to increase the threshold voltage and reduce leakage current. When switching operations are required, the control voltage is adjusted to lower the threshold voltage, thereby restoring fast switching performance. This dynamic adjustment resolves the contradiction by allowing the transistor to exhibit high-threshold characteristics only when needed for power savings, not during active switching operations.
Data Source
AI summary
Methods, systems, and devices for leakage current reduction in electronic devices are described. Electronic devices may be susceptible to leakage currents when operating in a first mode, such as an inactive (e.g., a standby) mode. To mitigate leakage current, an electronic device may include transistors coupled in cascode configuration where a gate of a drain-side transistor in the cascode configuration is configured to be biased by an adjustable (e.g., a dynamic) control signal. When the transistors are inactive (e.g., “off”), the control signal may be adjusted to prevent leakage associated with the inactive transistors. Further, a source-side transistor in the cascode configuration may be configured to have a high threshold voltage (e.g., relative to the drain-side transistor).