Cascode Pass Gate Layout for Off-State GIDL Suppression
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Solution Overview
Problem
Integrated circuits face issues with leakage current, particularly gate-induced drain leakage (GIDL) current, which increases power consumption and affects performance, especially when the circuit is in an off state, and existing process-centric approaches to reduce GIDL may compromise electrical performance and increase costs.
Innovation Solution
Implementing a cascode configuration with intermediate transistors between components prone to off-state leakage and sensitive nodes, where the second pass gate is biased in a conductive state to reduce the drain voltage and potential difference between gate and drain voltages, thereby minimizing or eliminating GIDL current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-generated harmful factors
If process-centric approaches are used to reduce GIDL current, then leakage current is reduced, but electrical performance is compromised and manufacturing costs increase
Solution Approach 1:
A cascode transistor is introduced as an intermediary component between the original transistor and the sensitive node. This cascode transistor acts as a mediator that blocks the GIDL current path while allowing the circuit to maintain its electrical performance. The cascode configuration provides a potential barrier that prevents leakage current from reaching sensitive nodes without requiring changes to the original transistor design or process parameters.
Solution Approach 2:
The circuit is segmented into multiple stages with the cascode transistor forming a separate stage between the input transistor and the output node. This segmentation isolates the GIDL-prone region from sensitive nodes, allowing each segment to be optimized independently. The original transistor can maintain its design for performance while the cascode stage handles leakage suppression.
2Object-generated harmful factors
If process-centric approaches are used to reduce GIDL current, then leakage current is reduced, but manufacturing costs increase
Solution Approach 1:
The cascode transistor serves multiple functions simultaneously: it blocks GIDL current, maintains signal integrity, and can be integrated using standard CMOS process steps. By designing the cascode configuration to use existing process capabilities rather than requiring specialized manufacturing steps, the solution achieves leakage reduction without proportionally increasing manufacturing complexity or cost.
3Object-generated harmful factors
If cascode configuration is implemented, then GIDL current is reduced, but device complexity increases
Solution Approach 1:
The cascode configuration is applied locally only at critical points where GIDL current would affect sensitive nodes, rather than throughout the entire circuit. This selective application minimizes the increase in device complexity while targeting the specific problem areas. Only transistors whose drains connect to sensitive nodes are modified with cascode structures.
Data Source
AI summary
Apparatuses for reducing leakage currents during an off state for transistors is described herein. An example apparatus includes a switch having an input node and an output node. The switch is configured to couple a signal on the input to the output node when the switch is in an on state and is further configured to decouple the input and output nodes when the switch is in an off state. The switch includes first and second transistors, and further includes third and fourth transistors. A drain electrode of the first transistor is coupled to a source electrode of the third transistor, a drain electrode of the second transistor is coupled to a source electrode of the fourth transistor, and the drain electrodes of the third and fourth transistors are coupled together to the output node.