Cascode Power Amplifier Dynamic Biasing for Battery Voltage

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Solution Overview

Problem

Conventional RF Power Amplifiers face challenges in achieving linear performance and reliability over a wide range of battery voltages, particularly at low voltages, due to the limitations of sub-micron technology and the cascode structure's protection mechanisms, which compromise linearity and efficiency.

Innovation Solution

A cascode-based Power Amplifier circuit with a sensing and biasing circuit that dynamically adjusts the biasing voltage of transistors based on the battery voltage, switching between a 'protected' mode for high voltages and an 'unprotected' mode for low voltages to maintain linearity and reliability, using a network of resistors and control signals to generate appropriate biasing voltages for the transistors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a cascode structure is used to protect transistors from high voltage, then reliability is improved, but linearity deteriorates at low battery voltages

Engineering Contradiction:
Improvetransistor protectionVSAvoidlinearity
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent implements dynamic switching between two biasing modes (protected and unprotected) based on battery voltage levels. The circuit automatically transitions from a protected cascode configuration at high voltages to an unprotected configuration at low voltages, optimizing performance for each operating condition rather than using a fixed static configuration.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The invention changes the biasing parameters (gate voltages of the cascode transistors) based on the operating voltage conditions. By adjusting the biasing voltages dynamically, the circuit maintains optimal linearity and efficiency across different battery voltage levels while still providing protection when needed.

Inventive Principle:
Principle #35Parameter changes

2Manufacturing precision

If complex linearization circuits or feedback loops are added to improve linearity at low voltage, then linearity is improved, but device complexity increases

Engineering Contradiction:
ImprovelinearityVSAvoidcircuit complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent extracts and removes the complex linearization circuits and feedback loops from the design. Instead of adding these complex components, the invention achieves linearity improvement through a simpler dynamic biasing mechanism that switches between protected and unprotected modes, eliminating the need for area-consuming linearization blocks and output couplers.

Inventive Principle:
Principle #2Taking out (Extraction)

3Loss of energy

If direct coupling of output stage to battery voltage is used, then power efficiency is improved, but reliability deteriorates due to voltage limits of sub-micron technology

Engineering Contradiction:
Improvepower efficiencyVSAvoidvoltage tolerance
Core Design Contradiction:
Loss of energyVSReliability

Solution Approach 1:

The patent uses dynamic switching between protected and unprotected configurations based on battery voltage levels. At low voltage conditions, the unprotected configuration allows direct coupling behavior for maximum efficiency. At high voltage conditions, the protected configuration activates to prevent exceeding transistor voltage limits, thus dynamically optimizing both efficiency and reliability.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS9312822B2Power amplifier circuit based on a cascode structure
Publication Date: 2016.04.12 ST ERICSSON SA
  • US9312822B2 patent drawing
  • US9312822B2 patent drawing
  • US9312822B2 patent drawing

AI summary

A Power amplifier circuit based on a cascode structure and to be powered by a power source voltage, e.g. a battery, said circuit comprising -a first transistor having a grid, source and drain terminal; said first transistor being connected in a common source mode; -a second grid source transistor having grid, source and drain terminal, said second transistor being connected in common grid mode; -a biasing circuit for biasing said first transistor and said second transistor. The PA is characterized in that it includes a circuit for sensing the value of the power source voltage and for generating at least a first and a second biasing voltage for the grid of said second transistor in accordance with the power source voltage sensed, said first biasing voltage providing substantially equal protection to said first and second transistors when said power source voltage is sensed to be at a high voltage and said second biasing voltage providing more voltage to said first transistor when said power source voltage is sensed to be at a low voltage.