Cascode Power Amplifier Circuit Without Booster Conversion
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Power amplifier circuits in mobile communication devices face limitations in increasing maximum output power without substantially increasing the circuit scale, particularly due to the collector-base withstand voltage of transistors and the need for booster conversion circuits to exceed battery voltage.
Innovation Solution
A power amplifier circuit design incorporating a lower-stage and upper-stage differential amplifying pair, cascode-connected transistors, and specific inductor and capacitor configurations to amplify signals without requiring a booster conversion circuit, allowing for increased output power without scaling the circuit.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If the power supply voltage is boosted to increase maximum output power, then the output power increases, but a booster conversion circuit is required which increases the circuit scale
Solution Approach 1:
The patent changes the voltage parameter through cascode connection, where the first transistor handles high voltage (Vcc1) and the second transistor handles low voltage (Vcc2), enabling the output to achieve voltage swing greater than the power supply voltage without requiring a booster conversion circuit
Solution Approach 2:
The patent segments the amplification function into two transistors with different voltage ratings, where the first transistor (e.g., HBT) handles the high-voltage side and the second transistor (e.g., MOSFET) handles the low-voltage side, allowing each component to operate within its optimal voltage range while achieving combined output power greater than what a single transistor could provide
2Stress or pressure
If cascode connection is used to increase maximum power supply voltage, then the power supply voltage can exceed battery voltage, but the circuit scale increases due to requiring a booster conversion circuit
Solution Approach 1:
The patent changes the voltage parameter through cascode connection, where the first transistor handles high voltage (Vcc1) and the second transistor handles low voltage (Vcc2), enabling the output to achieve voltage swing greater than the power supply voltage without requiring a booster conversion circuit
Solution Approach 2:
The patent uses capacitors (C1, C2) as intermediaries to couple the output signals from the collectors of the first and second transistors to the combiner, enabling voltage swing greater than the power supply voltage without requiring a booster conversion circuit
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively quadruples the output power by amplifying the collector voltage, enabling higher signal amplitude without boosting the power supply voltage or significantly increasing the circuit size, thus enhancing the power amplifier's efficiency and performance.
Implementation Method 1
An emitter or a source of the third transistor is grounded via the first inductor and is also connected to the collector or the drain of the first transistor via the first capacitor. An emitter or a source of the fourth transistor is grounded via the second inductor and is also connected to the collector or the drain of the second transistor via the second capacitor.
Data Source
AI summary
A power amplifier circuit includes lower-stage and upper-stage differential amplifying pairs, a combiner, first and second inductors, and first and second capacitors. First and second signals are input into the lower-stage differential amplifying pair. The upper-stage differential amplifying pair outputs first and second amplified signals. The combiner combines the first and second amplified signals. The lower-stage differential amplifying pair includes first and second transistors. A supply voltage is supplied to the collectors of the first and second transistors. The first and second signals are supplied to the bases of the first and second transistors. The upper-stage differential amplifying pair includes third and fourth transistors. A supply voltage is supplied to the collectors of the third and fourth transistors. The emitters of the third and fourth transistors are grounded via the first and second inductors and are connected to the first and second transistors via the first and second capacitors.