Cascode Reference Voltage Circuit Power Supply Rejection

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Solution Overview

Problem

Conventional reference voltage circuits face challenges in maintaining a high power supply rejection ratio at lower operating voltages due to channel length modulation effects, leading to fluctuations in output voltage, especially when power supply voltages drop below a certain threshold.

Innovation Solution

A cascode circuit is implemented with a bias voltage supply mechanism that adjusts the gate potential of depletion type MOS transistors, using a control current source to determine bias voltage and minimize voltage fluctuations, allowing the circuit to operate at lower power supply voltages without compromising the power supply rejection ratio.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional reference voltage circuit is used, then the circuit can operate at higher power supply voltages, but the power supply rejection ratio deteriorates due to channel length modulation effects causing output voltage fluctuations

Engineering Contradiction:
Improvepower supply rejection ratioVSAvoidoutput voltage stability
Core Design Contradiction:
ReliabilityVSStability of the object's composition

Solution Approach 1:

A cascode transistor is introduced as an intermediary element between the reference voltage circuit and the power supply. This cascode transistor acts as a buffer that isolates the reference voltage circuit from power supply fluctuations, thereby improving the power supply rejection ratio while maintaining output voltage stability.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The invention changes the operating parameters of the cascode transistor by applying a specific bias voltage to its gate terminal. This bias voltage is controlled to optimize the transistor's operating point, enabling it to effectively suppress channel length modulation effects and improve power supply rejection across different operating conditions.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If a cascode circuit is added to improve power supply rejection ratio, then the power supply rejection ratio improves, but the circuit complexity increases

Engineering Contradiction:
Improvepower supply rejection ratioVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The cascode transistor is designed to perform multiple functions simultaneously: it provides power supply rejection, maintains output voltage stability, and can be integrated with existing reference voltage circuit topologies. This multi-functionality reduces the need for additional separate components, thereby limiting the increase in circuit complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Use of energy by moving object

If the power supply voltage is reduced to lower power consumption, then the power consumption decreases, but the power supply rejection ratio deteriorates due to increased sensitivity to voltage fluctuations

Engineering Contradiction:
Improvepower consumptionVSAvoidpower supply rejection ratio
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The invention dynamically adjusts the gate bias voltage of the cascode transistor to maintain optimal operating conditions across different power supply voltage levels. This parameter adjustment ensures that the cascode transistor continues to effectively suppress channel length modulation effects even when operating at lower voltages, thereby maintaining power supply rejection ratio while enabling lower power consumption operation.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS7479821B2Cascode circuit and semiconductor device
Publication Date: 2009.01.20 ABLIC INC
  • US7479821B2 patent drawing
  • US7479821B2 patent drawing
  • US7479821B2 patent drawing

AI summary

A reference voltage circuit having a high power supply rejection ratio, and can operate at low voltage is provided. The reference voltage circuit includes a bias circuit constructed such that a depletion type transistor (3) is connected in series to a power supply voltage supply terminal of a load circuit, an enhancement type MOS transistor (4) for detecting current through the load circuit to operate as a current source is connected to the load circuit, a depletion type MOS transistor (5) is connected in series to the transistor (4), and a gate terminal of the transistor (5) is connected to a source terminal of the transistor (5), in which the gate terminal of the depletion type transistor (3) is connected to the source terminal of the depletion type transistor (5).