Cascode RF Power Amplifier Bulk Biasing for Low-Voltage Gain
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Solution Overview
Problem
Low-voltage radio frequency power amplifiers using MOS cascode arrangements suffer from limited gain, linearity, and power-added efficiency due to low drain-to-source voltage, particularly when operating with low-voltage batteries, necessitating complex circuits or large transistors to improve performance.
Innovation Solution
Implementing a cascode arrangement with a common gate transistor bulk connected to a resistor receiving a voltage greater than or equal to the source voltage, creating a floating point and allowing a zero or negative source-to-bulk voltage, thereby decreasing the threshold voltage and increasing the drain-to-source voltage of the common source transistor.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If a low-voltage power source is used to limit power consumption, then power consumption is reduced, but the drain-to-source voltage of the common source transistor decreases, limiting gain, linearity and power-added efficiency
Solution Approach 1:
The patent changes the voltage parameter by introducing a bootstrap circuit that generates a boosted voltage (VBST) higher than the power source voltage (VBAT). This allows the common gate transistor to operate at an elevated voltage level, maintaining adequate drain-to-source voltage across the common source transistor even when powered from low-voltage batteries, thus preserving gain, linearity and power-added efficiency while enabling low-power operation
2Reliability
If a bootstrap circuit is used to increase the gate voltage of the common gate transistor, then the drain-to-source voltage of the common source transistor increases, but the circuit complexity and size increase
Solution Approach 1:
The bootstrap circuit is designed to serve multiple functions: it boosts the voltage for the common gate transistor gate, provides the necessary voltage headroom for the common source transistor to achieve adequate drain-to-source voltage, and does so using a compact integrated circuit implementation. The circuit leverages existing power source voltage and generates the boosted voltage through capacitive coupling and switching, avoiding the need for external voltage regulators or complex voltage multiplication stages
3Reliability
If the size of the common gate transistor is increased to improve performance, then the drain-to-source voltage of the common source transistor increases, but the overall transistor size increases
Solution Approach 1:
Instead of increasing transistor size to improve voltage characteristics, the patent changes the operating voltage parameter by applying a boosted voltage (VBST) to the common gate transistor gate that is higher than the power source voltage. This voltage parameter change enables the common source transistor to maintain adequate drain-to-source voltage without requiring larger transistor dimensions, thus improving performance while keeping the transistor area compact
Data Source
AI summary
According to an embodiment, An integrated circuit comprising a first cascode radio frequency (RF) power amplifier that includes a first common source transistor having a gate configured to receive a first RF signal, and a source connected to a neutral point; a first common gate transistor having a gate and a drain connected to a power source node, and a source connected to a drain of the first common source transistor; and a first resistor coupled between a bulk of the first common gate transistor and a first bulk bias node configured to provide a voltage that is greater than or equal to a voltage at the source of the first common gate transistor, wherein the first resistor is configured to obtain a floating point.