Cascode High-Side Switch Circuit for Breakdown-Tolerant Switching

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Solution Overview

Problem

High-side switch circuits face challenges in improving breakdown tolerance while maintaining the ability to perform predetermined switching operations, particularly during ground fault tests, due to issues with nonuniform dissipation and secondary breakdown in existing cascode structures.

Innovation Solution

A high-side switch circuit configuration that includes a cascode connection of two DMOS transistors with a current detecting circuit and clamping circuits to manage gate voltages, ensuring equal drain-source voltages and limiting current through both transistors, thereby enhancing breakdown tolerance without compromising switching performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a cascode structure with two DMOS transistors is used, then breakdown tolerance is improved, but nonuniform dissipation and secondary breakdown occur

Engineering Contradiction:
Improvebreakdown toleranceVSAvoidnonuniform dissipation and secondary breakdown
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent implements a feedback mechanism where the gate voltage of the first DMOS transistor is controlled based on the drain-source voltage across the second DMOS transistor. When Vds2 exceeds a reference voltage, the gate voltage of the first transistor is adjusted to limit current, preventing nonuniform dissipation and secondary breakdown while maintaining breakdown tolerance.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent dynamically changes the gate voltage parameter of the first DMOS transistor based on operating conditions. By adjusting Vg1 according to Vds2, the transistor operates in different regions (linear or saturation) to balance voltage distribution and prevent harmful effects while maintaining high breakdown tolerance.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If current limiting is applied to prevent breakdown, then reliability is improved, but switching performance deteriorates

Engineering Contradiction:
Improvebreakdown preventionVSAvoidswitching performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent employs dynamic control where the gate voltage of the first DMOS transistor is adjusted in real-time based on the drain-source voltage of the second transistor. This dynamic adjustment allows the circuit to switch between current-limiting mode (for protection) and normal switching mode (for performance), resolving the contradiction between reliability and productivity.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

By changing the gate voltage parameter dynamically based on operating conditions, the patent enables the transistor to operate in different regions. During normal switching, full performance is maintained; during overvoltage conditions, current is limited to prevent breakdown, thus achieving both reliability and switching performance.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS8604842B2High-side switch circuit
Publication Date: 2013.12.10 KK TOSHIBA
  • US8604842B2 patent drawing
  • US8604842B2 patent drawing
  • US8604842B2 patent drawing

AI summary

The high-side switch circuit includes a first output MOS transistor that is connected, at a first end thereof, to a power supply terminal. The high-side switch circuit includes a second output MOS transistor that is connected to a second end of the first output MOS transistor at a first end thereof and to a voltage output terminal at a second end thereof. The high-side switch circuit includes a current detecting circuit that detects a current flowing through the first output MOS transistor and outputs a detection signal. The high-side switch circuit includes a first gate driver that applies a first control voltage to a gate of the first output MOS transistor. The high-side switch circuit includes a second gate driver that applies a second control voltage to a gate of the second output MOS transistor.