Cascoded Amplifier Compensation for Faster Capacitive-Load Settling
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Solution Overview
Problem
Conventional operating amplifiers suffer from performance degradation due to capacitive loads and the Miller effect, leading to elongated settling times and limited high-speed performance, especially in sampled data systems with high-frequency switching regulators.
Innovation Solution
A signal amplifying apparatus is designed with an input stage circuit, a cascoded circuit comprising transistors with different equivalent oxide thicknesses, and an output stage circuit, where a capacitor is connected between the output stage and the cascoded circuit to reduce feed-forward paths and enhance transconductance, thereby increasing the pole-zero doublet frequency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If a feed-forward path is formed by compensation resistor and capacitor in conventional operating amplifier, then the operating amplifier can be stabilized, but severe degradation occurs for capacitive loads and negative power supply displays a zero at dominant pole frequency
Solution Approach 1:
The patent extracts and eliminates the feed-forward path formed by the compensation resistor and capacitor that causes the zero at dominant pole frequency. By removing this harmful feed-forward path, the invention avoids the performance degradation for capacitive loads while maintaining amplifier stability through alternative compensation mechanisms.
Solution Approach 2:
The patent converts the harmful effect of the feed-forward path into a benefit by using the compensation capacitor to create a dominant pole for stability, while simultaneously eliminating the feed-forward path that causes the zero at dominant pole frequency. This transforms the potential harm into a beneficial stable amplifier design without performance degradation.
2Object-generated harmful factors
If grounded gate cascade compensation is used to eliminate feed-forward path, then virtual ground is provided, but pole-zero doublet near unity-gain frequency elongates settling time
Solution Approach 1:
The patent applies local quality by using transistors with different equivalent oxide thicknesses (I/O devices with thicker oxide vs. core devices with thinner oxide) in specific locations within the cascoded circuit. This local differentiation optimizes the pole-zero doublet frequency locally without affecting the entire amplifier uniformly, thereby reducing settling time while maintaining feed-forward path elimination.
Solution Approach 2:
The patent changes the parameter of equivalent oxide thickness in the cascoded transistor to optimize performance. By using I/O devices with different oxide thicknesses than core devices, the invention modifies the electrical characteristics locally to increase the pole-zero doublet frequency and reduce settling time while maintaining the benefits of feed-forward path elimination.
3Speed
If I/O devices with different equivalent oxide thicknesses are used in cascoded circuit, then pole-zero doublet frequency is increased, but device complexity increases
Solution Approach 1:
The patent applies dynamics by selectively using different transistor types (I/O devices with different oxide thicknesses) in the cascoded circuit based on their specific functional requirements. This dynamic allocation of device types optimizes the pole-zero doublet frequency without uniformly increasing complexity across the entire amplifier, as only specific transistors use the more complex I/O device configuration.
Data Source
AI summary
The present invention provides a signal amplifying apparatus, for converting a first input signal into a first output signal. The signal amplifying apparatus includes an input stage circuit for receiving the first input signal; a cascoded circuit coupled to the input stage circuit, including a plurality of first cascoded transistors, wherein equivalent oxide thicknesses of the first cascoded transistors are not the same; an output stage circuit has a first input port coupled to the cascoded circuit, and a first output port for outputting the first output signal; and a first capacitor has a first terminal connected to the first output port of the output stage circuit and a second terminal coupled to the cascoded circuit, wherein the second terminal is not connected to the first input port of the output stage circuit.