Cascoded III-Nitride Power Transistor Gate Oscillation Damping
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Solution Overview
Problem
Composite semiconductor devices formed by cascading III-nitride power transistors with low voltage semiconductor devices often experience undesirable oscillations in high current applications, leading to reduced durability and functionality due to uncontrolled gate oscillations caused by semiconductor package inductances and output capacitance.
Innovation Solution
Implementing a composite semiconductor device with active oscillation control by cascading a normally ON III-nitride power transistor with a low voltage device, configuring the LV device to limit the gain of the composite device through reduced semiconductor package inductance, monolithic integration, or optimizing oxide thickness to reduce output resistance and transconductance, thereby stabilizing the device against oscillations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a depletion mode III-nitride power transistor is cascoded with a low voltage semiconductor device to produce an enhancement mode composite power device, then normally OFF characteristics are achieved, but gate oscillations occur due to semiconductor package inductances and output capacitance
Solution Approach 1:
An oscillation prevention circuit is introduced as an intermediary component between the III-nitride power transistor and the low voltage semiconductor device. This circuit includes a capacitor connected between the gate and source of the III-nitride transistor, and a resistor connected between the gate and ground, which act as mediators to dampen oscillations while preserving the normally OFF characteristics of the composite device.
Solution Approach 2:
The oscillation prevention circuit changes the electrical parameters at the gate of the III-nitride transistor by introducing capacitive and resistive elements. The capacitor value and resistor value are specifically selected to provide adequate damping of gate oscillations while maintaining the desired switching characteristics and normally OFF operation of the composite power device.
2Power
If the composite device is used in high current applications, then power handling capability is improved, but oscillations become more severe and can be destructive
Solution Approach 1:
The oscillation prevention circuit provides preliminary anti-action by preemptively damping potential oscillations before they can grow to destructive levels. The capacitor and resistor are configured to counteract the oscillatory tendency caused by the interaction between package inductance and output capacitance, particularly under high current conditions where oscillations would otherwise be most severe.
3Ease of manufacture
If standard packaging is used for the composite device, then manufacturing simplicity is maintained, but package inductances contribute to gate oscillations
Solution Approach 1:
Rather than modifying the packaging to reduce inductance, an oscillation prevention circuit is introduced as an intermediary that compensates for the package inductance effects. This approach maintains the simplicity of standard packaging while adding minimal complexity through the capacitor and resistor components that actively prevent oscillations.
Data Source
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AI summary
There are disclosed herein various implementations of composite semiconductor devices with active oscillation control. In one exemplary implementation, a normally OFF composite semiconductor device (200) comprises a normally ON III-nitride power transistor (210) and a low voltage, LV, device (220) cascoded with the normally ON III-nitride power transistor to form the normally OFF composite semiconductor device. The LV device may be configured to include one or both of a reduced output resistance due to, for example, a modified body implant and a reduced transconductance due to, for example, a modified oxide thickness to cause a gain of the composite semiconductor device to be less than approximately 10,000.