Cascoded I/O Protection with Dynamic Bias for Voltage Stress Control
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Solution Overview
Problem
Input-output devices face challenges in interfacing between different voltage domains, particularly when operating in a lower voltage domain and needing to handle higher voltage signals, leading to potential overstress and reduced component lifespan due to excessive voltage differences, especially during transient events.
Innovation Solution
A cascoded input-output device with a protected node that applies a bias voltage selected by switch steering circuitry, which changes in response to input signal transitions to clamp the output signal at the maximum voltage of the lower domain, thereby reducing voltage stress on cascode switches and improving operational speed without significant DC power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If I/O components operate in a lower voltage domain (1.8V) to reduce power consumption and increase operating speed, then power consumption decreases and speed increases, but the components are exposed to excessive voltage differences during transient events when interfacing with higher voltage domains (3.3V), causing VDS overstress and reducing component lifetime
Solution Approach 1:
The patent applies preliminary action by pre-charging the gate of the cascode transistor before the main switching event occurs. The gate is charged to a high voltage level in advance through a dedicated charging path, so that when the switching event happens, the cascode transistor is already prepared to handle the voltage transition without experiencing excessive VDS stress. This preliminary preparation eliminates the harmful voltage spike that would otherwise occur during transient events.
Solution Approach 2:
The patent introduces an intermediary element - a capacitor connected to the gate of the cascode transistor - that mediates between the high voltage domain and the low voltage domain. This capacitor acts as a buffer that can store charge at high voltage levels and release it when needed, protecting the cascode transistor from direct exposure to excessive voltage differences while still enabling the transistor to function properly during voltage transitions.
2Reliability
If cascode switches are used to protect I/O components from excessive voltage, then component protection is improved, but the switching speed and operational performance deteriorate due to the additional transistor stage
Solution Approach 1:
The patent applies preliminary action by pre-charging the gate of the cascode transistor before the main switching event. This preparation in advance ensures that when switching is required, the cascode transistor can respond immediately without the delay of charging its gate through a resistive path, thus maintaining high switching speed while still providing protection.
Solution Approach 2:
The patent makes the gate voltage of the cascode transistor dynamic rather than static. The gate voltage is adjusted in real-time based on the switching state - charged to a high level during transient events for protection, and maintained at an appropriate level during normal operation for optimal performance. This dynamic adjustment allows the system to adapt to different operating conditions and maintain both protection and speed.
Data Source
AI summary
A cascoded input-output device is provided configured to receive at an input node a lower voltage input signal and to generate at an output node a higher voltage output signal. The input-output device is split into two voltage domains to enable output signals in a larger range to be generated, while the components of the input-output device individually operate in a smaller range. By applying a selected bias voltage to a protected node of the cascoded input-output device, first changing that selected bias voltage in response to a transition of the input signal and then switching that selected bias voltage back when the output signal reaches a predetermined level, that node is protected, either avoiding stress-inducing voltage swings or providing a switching speed increasing charge boost.