Cascoded JFET Segments High Voltage and Pinch-off Control
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Solution Overview
Problem
Conventional JFET devices face significant limitations due to variations in epitaxial layer thickness, leading to large pinch-off voltage variations, which restrict their operating voltage range and require larger device sizes to handle current, resulting in increased costs and reduced performance.
Innovation Solution
A cascoded junction field effect transistor (JFET) configuration is introduced, comprising a low voltage JFET with a shallow buried channel and a high voltage JFET connected to its drain, allowing for a high pinch-off voltage with tight variations, effectively combining the advantages of both high and low voltage JFETs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If a conventional high voltage JFET is manufactured using a deep N-channel implant, then the device can achieve high breakdown voltage, but the pinch-off voltage varies significantly due to epitaxial layer thickness variations
Solution Approach 1:
The JFET device is divided into two separate stages: a first stage JFET optimized for high breakdown voltage with a deep N-channel implant, and a second stage JFET optimized for tight pinch-off voltage control with a shallow N-channel implant. This segmentation allows each stage to independently optimize its characteristics without the trade-offs present in a single-stage device.
Solution Approach 2:
The first stage JFET acts as an intermediary between the high voltage requirement and the second stage JFET. It handles the high breakdown voltage stress and presents a more stable voltage environment to the second stage, which then provides precise pinch-off control. This intermediary structure resolves the contradiction by separating the conflicting requirements into different functional blocks.
2Strength
If the epitaxial layer thickness is increased to support higher operating voltages, then the breakdown voltage increases, but the pinch-off voltage variations become larger
Solution Approach 1:
The device separates the high voltage handling function (first stage with deep implant) from the pinch-off control function (second stage with shallow implant). This allows the epitaxial layer to be optimized for high voltage without compromising pinch-off consistency, as the shallow implant in the second stage is less sensitive to thickness variations.
Solution Approach 2:
Different regions of the device have different implant depths tailored to their specific functions: the first stage uses a deep N-channel implant for high breakdown voltage, while the second stage uses a shallow N-channel implant for consistent pinch-off control. This local differentiation resolves the contradiction by applying different qualities to different parts of the system.
3Reliability
If the pinch-off voltage is reduced to ensure it does not exceed the maximum operating voltage, then voltage safety is improved, but the channel resistance increases and current handling capability decreases
Solution Approach 1:
The current handling function is separated from the voltage safety function. The first stage JFET with deep implant provides high current handling capability, while the second stage with shallow implant ensures voltage safety through consistent pinch-off control. This segmentation allows both requirements to be satisfied simultaneously.
Solution Approach 2:
The solution moves from a single-dimensional trade-off (pinch-off voltage vs. current handling) to a two-dimensional solution space by adding a second stage. This allows optimization in both dimensions independently, achieving voltage safety and current handling capability without the traditional compromise.
4Manufacturing precision
If a shallow N-channel implant is used to achieve tight pinch-off voltage control, then pinch-off consistency improves, but the operating voltage capability is reduced
Solution Approach 1:
The device architecture separates the pinch-off control function (second stage with shallow implant) from the high voltage capability function (first stage with deep implant). This allows the shallow implant to provide tight pinch-off control without limiting the overall operating voltage, as the deep implant in the first stage handles the high voltage requirement.
Solution Approach 2:
The patent combines two JFET stages with different implant characteristics into a single integrated device. The first stage contributes high voltage capability while the second stage contributes tight pinch-off control, and together they achieve both objectives simultaneously through their cascaded configuration.
Data Source
AI summary
A cascoded junction field transistor (JFET) device comprises a first stage high voltage JFET cascoded to a second stage low voltage JFET wherein one of the first and second stages JFET is connected to a drain electrode of another JFET stage.


