Cascoded MOSFET Current Sensing for Accurate PoE Current Limiting

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Solution Overview

Problem

Existing current sensing and limiting technologies face challenges in accurately measuring and controlling current levels in high-voltage applications like Power over Ethernet (PoE), particularly in maintaining low input offset voltages and thermal stability, which affect the accuracy and efficiency of current sensing and limiting circuits.

Innovation Solution

The use of cascoded power MOSFETs, comprising a high-voltage MOSFET and a low-voltage MOSFET, along with servo and current limit amplifiers, to create a current sensing and limiting circuit that separates high voltage from internal circuitry, ensuring accurate current replication and limiting, while minimizing self-heating and area consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If a single power MOSFET is used for current sensing, then the circuit area is reduced, but thermal stability and measurement precision deteriorate due to self-heating effects

Engineering Contradiction:
Improvecircuit areaVSAvoidcurrent sensing accuracy
Core Design Contradiction:
Area of stationary objectVSMeasurement precision

Solution Approach 1:

The patent divides the power MOSFET into two separate devices: a main power MOSFET for current conduction and a sense MOSFET for current sensing. This segmentation allows the sense MOSFET to operate at low current levels, minimizing self-heating effects and improving measurement precision while maintaining compact circuit area through integrated design.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The sense MOSFET acts as an intermediary device that replicates the current characteristics of the main power MOSFET without carrying the full current load. By using the sense MOSFET as a mediator, the system achieves accurate current sensing while the main power MOSFET handles the high current conduction, separating the sensing and power functions.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Stress or pressure

If high voltage is directly applied to the sensing circuitry, then the voltage handling capability is improved, but the input offset voltage and thermal stability worsen

Engineering Contradiction:
Improvevoltage handling capabilityVSAvoidthermal stability
Core Design Contradiction:
Stress or pressureVSReliability

Solution Approach 1:

The patent segments the voltage handling function from the sensing function by using a cascode configuration. The main power MOSFET handles the high voltage stress, while the sense MOSFET operates at low voltage levels, protecting the sensitive sensing circuitry from high voltage effects and maintaining thermal stability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The cascode structure introduces an intermediary layer between the high voltage main power MOSFET and the low voltage sense MOSFET. This intermediary configuration allows the high voltage to be handled by the main device while the sense device operates in a protected, low-stress environment, improving reliability and thermal stability.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Measurement precision

If the sense MOSFET carries the full current, then the current replication is direct, but power loss and self-heating increase

Engineering Contradiction:
Improvecurrent replication accuracyVSAvoidpower dissipation
Core Design Contradiction:
Measurement precisionVSLoss of energy

Solution Approach 1:

The patent uses the sense MOSFET to create a scaled-down copy of the main power MOSFET's current characteristics. Instead of having the sense MOSFET carry the full current, it replicates the current waveform at a reduced level proportional to its size ratio, maintaining measurement accuracy while minimizing power dissipation.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The patent changes the operating parameters of the sense MOSFET by biasing it to operate in the linear region with a small fraction of the main current. This parameter change allows accurate current replication through proportional scaling while reducing power loss and self-heating in the sense device.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the accuracy and efficiency of current sensing and limiting in PoE applications by maintaining precise voltage and current matching, even under varying thermal conditions, thus meeting IEEE 802.3bt standards with reduced area and power dissipation.

Implementation Method 1

a first power metal oxide semiconductor field effect transistor (MOSFET) is used to sense (e.g., identify, measure, etc.) the current conducting through a second main power metal oxide semiconductor field effect transistor (MOSFET)

Methodology Applied
Scientific EffectCurrent mirroring:

Data Source

PatentEP4000220B1Methods and apparatus for current sensing and current limiting
Publication Date: 2026.01.07 TEXAS INSTRUMENTS INC
  • EP4000220B1 patent drawingFigure 1
  • EP4000220B1 patent drawingFigure 2
  • EP4000220B1 patent drawingFigure 3

AI summary

Methods, apparatus, systems and articles of manufacture are disclosed for current sensing and current limiting. An example apparatus includes a first main transistor (302) including a first main transistor gate terminal (306) coupled between an output terminal (108) and an intermediate node (201); a second main transistor (312) including a second main transistor gate terminal (318) coupled between the intermediate node (201) and a ground terminal; a first amplifier (350) including a first amplifier output (362) coupled to the first main transistor gate terminal (306); a second amplifier (310) including a second amplifier output (364) coupled to the second main transistor gate terminal (318); and a third amplifier (330) including a third amplifier inverting input coupled to the intermediate node (201), a third amplifier non-inverting input coupled to a sense transistor (314), and a third amplifier output coupled to a third gate terminal (338) of a third transistor (332).