Cascoded Semiconductor Component Parasitic Reduction
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Solution Overview
Problem
The increasing number of packages in cascoded semiconductor components leads to higher costs and degraded performance due to parasitic capacitance and inductance, making existing manufacturing methods inefficient and costly.
Innovation Solution
A cascoded semiconductor device is fabricated using a III-Nitride semiconductor chip with a floating substrate configuration, where the III-N transistor is electrically isolated from the silicon-based diode, reducing the need for separate packages and minimizing parasitic effects by integrating the components on a single substrate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If separate packages are used for silicon device and depletion mode devices, then manufacturing and protection are simplified, but manufacturing cost increases and performance degrades due to increased parasitics
Solution Approach 1:
The patent combines multiple semiconductor devices (silicon device and depletion mode III-N device) into a single integrated package structure. The devices are mounted on a common substrate with shared electrical connections, eliminating the need for separate packages and leadframe leads. This merging approach reduces the number of discrete components while maintaining ease of manufacturing through standardized packaging processes.
Solution Approach 2:
The integrated package is divided into distinct functional regions: a first region housing the silicon device and a second region housing the depletion mode III-N device. Each device region has its own contact pads and bonding structures, allowing independent device fabrication and assembly while achieving overall integration. This segmentation enables modular manufacturing where devices can be prepared separately and then combined in the final package.
2Reliability
If separate packages are used for silicon device and depletion mode devices, then device protection is improved, but manufacturing cost increases
Solution Approach 1:
Multiple devices are protected within a single integrated package structure rather than separate packages. The common substrate and unified encapsulation provide collective protection for both the silicon device and depletion mode III-N device, reducing the total number of protective housings needed while lowering manufacturing costs through economies of scale.
Solution Approach 2:
The single package structure serves multiple functions: it protects both devices, provides electrical connections, establishes proper biasing configurations, and enables thermal management for multiple components. This multi-functional design eliminates the need for separate protective packages for each device, reducing overall manufacturing complexity and cost.
3Ease of manufacture
If separate packages are used and connected via leadframe leads, then device assembly is simplified, but parasitic capacitance and inductance increase
Solution Approach 1:
The electrical connections between devices are achieved through direct bonding on the same substrate rather than through external leadframe leads. The bonding pads and interconnect structures are integrated into the substrate itself, creating short, low-inductance pathways that eliminate the parasitic effects of long leadframe connections while maintaining assembly simplicity.
Solution Approach 2:
The common substrate acts as an intermediary structure that provides direct electrical interconnection between the silicon device and depletion mode III-N device. This substrate-mediated connection replaces the leadframe lead intermediary, offering lower parasitic inductance and capacitance while maintaining the ease of assembly through standardized substrate bonding processes.
4Object-affected harmful factors
If devices are integrated on a single substrate, then parasitic effects are reduced, but manufacturing complexity increases
Solution Approach 1:
The integrated substrate is divided into distinct device regions with separate contact pads and bonding structures. This segmentation allows each device to be fabricated and prepared independently using standardized processes, then assembled into the final integrated structure. The modular regional design reduces manufacturing complexity compared to fully monolithic integration.
Solution Approach 2:
The common substrate performs multiple functions: it provides mechanical support, establishes electrical connections, enables thermal management, and defines the geometric configuration for device mounting. This multi-functional substrate design simplifies manufacturing by consolidating multiple functions into a single component rather than requiring separate structures for each function.
Data Source
AI summary
In accordance with an embodiment, a semiconductor component includes a support and a plurality of leads. An insulated metal substrate having a first portion and a second portion bonded to the support. A semiconductor chip comprising a III-N semiconductor material is bonded to the first portion of the insulated metal substrate and a first electrical interconnect is coupled between a drain bond pad the first portion of the insulated metal substrate. A second semiconductor chip is bonded to the first electrical interconnect. A second electrical interconnect coupled between a lead of the plurality of leads and the second semiconductor chip. In accordance with another embodiment, a method of manufacturing a semiconductor component includes coupling a first semiconductor chip to a first electrically conductive layer and coupling a second semiconductor chip to a second electrically conductive layer.