Cascoded Electronic Switch Biasing to Suppress GIDL Leakage
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Solution Overview
Problem
Electronic switches face challenges in minimizing leakage current due to Gate Induced Drain Leakage (GIDL) when in the off state, particularly as voltage levels fluctuate between VSS and VDD, affecting signal integrity and circuit stability.
Innovation Solution
The electronic switch incorporates cascoded transistors with one transistor's gate biased at an intermediate voltage and an injection shunting device to prevent voltage fluctuations, minimizing GIDL leakage by ensuring the drain-to-gate voltage remains below or above the GIDL threshold, depending on the transistor type, and using control signals to manage the switch's on and off states effectively.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the switch is in the off state with standard transistor configuration, then the switch blocks signal transmission, but leakage current increases due to GIDL effect
Solution Approach 1:
An intermediate voltage source is introduced as a mediator between the gate and ground/reference potential. This intermediate voltage (V_INT) is applied to the gate of the first transistor in the cascoded pair, creating an electrical potential that prevents the drain-to-gate voltage from exceeding the GIDL threshold while maintaining the transistor in the off state. The intermediate voltage acts as a buffer that reconciles the conflicting requirements of blocking signal transmission and minimizing leakage current.
Solution Approach 2:
The gate voltage parameter is changed from a binary state (fully on or fully off) to a three-state system (on, off with intermediate voltage, and off with reference voltage). By applying an intermediate voltage level to the gate of the first transistor, the electrical parameters are optimized to keep the drain-to-gate voltage below the GIDL threshold. This parameter modification transforms the transistor's electrical characteristics to reduce leakage while maintaining the off state's signal blocking capability.
2Loss of energy
If cascoded transistors are used to reduce leakage, then GIDL effect is minimized, but device complexity increases
Solution Approach 1:
The single transistor switch is segmented into a cascoded pair of transistors connected in series between the signal path and the output node. This segmentation divides the voltage blocking function across two transistors, with the first transistor's gate controlled by an intermediate voltage and the second transistor's gate controlled by a reference voltage. The segmentation allows each transistor to operate within optimized voltage ranges, reducing GIDL leakage while distributing the complexity across modular components that can be independently designed and analyzed.
3Reliability
If the gate voltage is kept at extreme levels (VDD or VSS) to ensure complete turn-off, then signal blocking is effective, but GIDL leakage increases
Solution Approach 1:
The gate voltage parameter is changed from extreme binary levels (VDD or VSS) to an intermediate level (V_INT) for the first transistor in the cascoded pair. This parameter modification ensures that the drain-to-gate voltage of the first transistor remains below the GIDL threshold while the transistor remains in the off state. The intermediate voltage parameter optimizes the electrical characteristics to simultaneously achieve effective signal blocking and minimize GIDL leakage current.
Solution Approach 2:
An intermediate voltage source serves as a mediator between the extreme voltage levels of VDD and VSS. Instead of applying extreme voltages directly to the gate, the intermediate voltage acts as a buffer that maintains the transistor in the off state while preventing the drain-to-gate voltage from exceeding the GIDL threshold. This intermediary approach reconciles the conflicting requirements of complete signal blocking and leakage current minimization.
Data Source
AI summary
An electronic switch that includes a signal path with a first terminal side of the signal path including cascoded transistors in the signal path. When the switch is in an off state, the gate of one of the cascoded transistors is biased at an intermediate voltage different from the voltage applied to the gate of the other of the cascoded transistors. In one embodiment, having the gate of one of the cascoded transistors biased at an intermediate voltage in an off state may reduce leakage current into a signal terminal of the switch. The electronic switch includes an injection shunting device (e.g. such as a transistor) connected to a node of the signal path. In one embodiment, the injection shunting device prevents the voltage of the node from reaching a specific voltage level due to leakage current when the switch is in an off state.