Cascoded Thin-Oxide Transistors for eDRAM Wordline Drivers
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Solution Overview
Problem
Existing wordline drivers in embedded random access memory (eDRAM) require larger layout areas and higher power consumption due to the use of thick-oxide transistors to handle high voltage swings, which increases production costs.
Innovation Solution
The implementation of cascoded thin-oxide transistors with a thinner oxide layer than regular transistors, reducing the layout area and power consumption by using fewer masks and optimizing the voltage levels for the wordline drivers, allowing for efficient switching between VPP and VBB voltages while minimizing transistor damage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If thick-oxide transistors are used to handle high voltage swings, then transistor reliability is improved, but layout area increases
Solution Approach 1:
The patent divides the single thick-oxide transistor into multiple thin-oxide transistors arranged in a cascoded configuration. This segmentation allows the system to handle high voltage swings through series connection while using smaller individual transistor units, thereby reducing the overall layout area while maintaining reliability.
Solution Approach 2:
The patent transitions from using a single thick-oxide transistor to a multi-stage cascoded structure of thin-oxide transistors. This dimensional change in the circuit architecture allows voltage handling capability to be achieved through series connection rather than relying on single large transistors, reducing area consumption.
2Reliability
If thick-oxide transistors are used to handle high voltage swings, then transistor reliability is improved, but power consumption increases
Solution Approach 1:
The patent segments the voltage handling function across multiple thin-oxide transistors in cascoded configuration. Each transistor handles a portion of the voltage swing, reducing the power consumption associated with charging and discharging large gate capacitances of a single thick-oxide transistor while maintaining the ability to handle the full voltage range.
Solution Approach 2:
The patent changes the operational parameters by using multiple thin-oxide transistors with optimized sizing and biasing in a cascoded arrangement. This parameter optimization reduces dynamic power consumption compared to using a single thick-oxide transistor while preserving the high voltage swing capability needed for reliability.
3Reliability
If thick-oxide transistors are used to handle high voltage swings, then transistor durability is improved, but manufacturing cost increases
Solution Approach 1:
The patent segments the transistor implementation into multiple standard thin-oxide devices rather than requiring specialized thick-oxide transistors. This segmentation allows use of standard manufacturing processes for thin-oxide devices, reducing manufacturing complexity and cost while achieving the same durability through proper cascoded design and voltage distribution.
Solution Approach 2:
The patent changes the manufacturing approach by using standard thin-oxide transistor processes with optimized electrical parameters (sizing, biasing, connectivity) in a cascoded configuration. This parameter optimization achieves the required transistor durability without requiring expensive thick-oxide process variations, thereby reducing manufacturing costs.
Data Source
AI summary
A method of controlling a wordline by a driver decoder circuit includes generating a first control signal having a first logically high level and a first logically low level, and generating a second control signal having a second logically high level when the first control signal has the first logically high level and a second logically low level when the first control signal has the first logically low level. The first logically high level is different from the second logically high level, and the first logically low level is different from the second logically low level. The method includes coupling the wordline to a first node having a first voltage value in response to the first control signal having the first logically low level and decoupling the wordline from a second node having a second voltage value in response to the second control signal having the second logically low level.


