Cast Polyurethane Polishing Pad for Semiconductor CMP
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Solution Overview
Problem
Current polyurethane polishing pads used in semiconductor fabrication lack the necessary metal removal rate and low defectivity for demanding applications, particularly with low k and ultra-low k dielectrics, which complicates planarization and increases CMP-induced defectivity.
Innovation Solution
A polishing pad composed of a cast polyurethane polymeric material formed from a prepolymer reaction of H12MDI/TDI with polytetramethylene ether glycol, with specific stoichiometric ratios and cured with 4,4′-methylenebis(2-chloroaniline), providing a balanced shear storage and loss modulus, porosity, and density for enhanced mechanical integrity and removal efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional polyurethane polishing pads are used, then mechanical integrity and chemical resistance are maintained, but metal removal rate and low defectivity are insufficient
Solution Approach 1:
The patent applies parameter changes by precisely controlling the stoichiometric ratio of amine to isocyanate groups (NH2:NCO = 102:107 to 109:100) in the polyurethane formulation. This specific parameter adjustment optimizes the balance between mechanical integrity and metal removal rate while minimizing defectivity, directly resolving the contradiction between productivity and reliability.
Solution Approach 2:
The patent uses composite materials by combining polytetramethylene ether glycol with specific curative agents (4,4'-methylenebis(2-chloroaniline) and/or toluene diisocyanate) in controlled ratios. This composite approach creates a polyurethane system that simultaneously achieves high metal removal rate, low defectivity, and maintained mechanical integrity.
2Adaptability or versatility
If low k and ultra-low k dielectrics are processed, then device complexity is reduced, but mechanical strength and adhesion deteriorate
Solution Approach 1:
The patent applies parameter changes by adjusting the polyol molecular weight and stoichiometric ratio to optimize the polyurethane pad's mechanical properties. These parameter adjustments enable the pad to maintain sufficient mechanical strength and adhesion when processing soft low k and ultra-low k dielectrics, while still achieving the required metal removal rate and planarization.
3Productivity
If feature sizes are decreased, then device integration is improved, but CMP-induced defectivity increases
Solution Approach 1:
The patent applies parameter changes by optimizing the polyurethane formulation's stoichiometric ratio and curative agent content to reduce CMP-induced defectivity. This enables effective polishing of features at 0.5 micrometer and below while minimizing scratches and defects, directly addressing the contradiction between device integration and reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The polishing pad achieves improved metal removal rates with reduced defectivity, specifically demonstrated in TEOS and tungsten removal, while maintaining stringent planarity and topography requirements, outperforming industrial standards like IC1000 and VP5000 pads.
Implementation Method 1
the isocyanate-terminated reaction product being cured with a 4,4′-methylenebis(2-chlororaniline) curative agent
Implementation Method 2
In each CMP process, a polishing pad in combination with a polishing solution, such as an abrasive-containing polishing slurry or an abrasive-free reactive liquid, removes excess material in a manner that planarizes or maintains flatness
Implementation Method 3
the cast polyurethane polymeric material, as measured in a non-porous state, having a shear storage modulus, G′ of 250 to 350 MPa as measured with a torsion fixture at 30° C. and 40° C. and a shear loss modulus, G′′ of 25 to 30 MPa as measured with a torsion fixture at 40° C.
Data Source
AI summary
The polishing pad is for planarizing at least one of semiconductor, optical and magnetic substrates. The polishing pad includes a cast polyurethane polymeric material formed from a prepolymer reaction of H12MDI/TDI with polytetramethylene ether glycol to form an isocyanate-terminated reaction product. The isocyanate-terminated reaction product has 8.95 to 9.25 weight percent unreacted NCO and has an NH2 to NCO stoichiometric ratio of 102 to 109 percent. The isocyanate-terminated reaction product is cured with a 4,4′-methylenebis(2-chlororaniline) curative agent. The cast polyurethane polymeric material, as measured in a non-porous state, having a shear storage modulus, G′ of 250 to 350 MPa as measured with a torsion fixture at 30° C. and 40° C. and a shear loss modulus, G″ of 25 to 30 MPa as measured with a torsion fixture at 40° C. The polishing pad having a porosity of 20 to 50 percent by volume and a density of 0.60 to 0.95 g/cm3.