Cathode Planar Emitter Fabrication via Sacrificial Mould
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Solution Overview
Problem
The high cost and complexity of manufacturing large-area field emission devices with precise control structures, particularly due to the vulnerability of tip-based systems to damage and the need for expensive semiconductor fabrication techniques, as well as the limitations of existing broad-area emitters in achieving low control voltages.
Innovation Solution
A method for fabricating cathode planes using a negative mould of sacrificial material to define via and track structures, where functional layers are deposited, and raised elements are formed and subsequently removed to create emitter cells, allowing for the use of photoresist layers and dielectric inks to achieve the desired geometry without anisotropic reactive ion etching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If tip-based emitting systems are used to achieve low control voltages, then control voltage is reduced, but manufacturing cost and complexity increase due to the need for precise semiconductor fabrication techniques
Solution Approach 1:
The patent replaces expensive, fragile tip-based emitters with robust planar emitters that can be manufactured using inexpensive, scalable techniques like screen printing and sputtering. The planar structure eliminates the need for complex semiconductor fabrication while maintaining electrical performance.
Solution Approach 2:
The invention substitutes mechanical tip structures with planar surface structures, replacing complex three-dimensional micromechanical fabrication with simpler two-dimensional deposition and printing processes. This substitution dramatically reduces manufacturing complexity while achieving the same electrical field emission function.
2Use of energy by moving object
If tip-based emitting systems are used to achieve low control voltages, then control voltage is reduced, but manufacturing cost increases due to expensive semiconductor fabrication techniques
Solution Approach 1:
The patent replaces expensive, fragile tip-based emitters with robust planar emitters that can be manufactured using inexpensive, scalable techniques like screen printing and sputtering. The planar structure eliminates the need for complex semiconductor fabrication while maintaining electrical performance.
Solution Approach 2:
The invention changes the geometric parameters from three-dimensional tips to two-dimensional planar surfaces, which fundamentally alters the manufacturing approach from expensive precision machining to inexpensive deposition and printing processes, while maintaining the electrical field emission function.
3Area of stationary object
If large area devices are manufactured using tip-based systems, then device area is increased, but manufacturing difficulty and cost increase significantly
Solution Approach 1:
The patent divides the large-area device into modular planar segments that can be manufactured independently using screen printing and sputtering, then assembled into the final large-area configuration. This segmentation enables scalable manufacturing without increasing per-unit complexity.
Solution Approach 2:
The planar emitter structure serves multiple functions simultaneously: it provides the emission surface, defines the gate geometry, and enables scalable manufacturing. This multi-functionality reduces the number of separate manufacturing steps required for large-area devices.
4Manufacturing precision
If anisotropic reactive ion etching is used to create precise via structures, then manufacturing precision is improved, but device complexity and manufacturing cost increase
Solution Approach 1:
The patent replaces complex anisotropic reactive ion etching processes with simpler sputtering and screen printing techniques. The via structures are formed by direct deposition through self-aligned masks rather than complex etching processes, dramatically reducing process complexity while maintaining precision.
Solution Approach 2:
The invention performs preliminary alignment and positioning of the emitter pattern before deposition, using self-aligned mask techniques. This preliminary action ensures precise via geometry is achieved through simple deposition rather than complex subsequent etching steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces manufacturing costs and complexity while maintaining control over emitted current, enabling the production of large-area field emission devices with improved stability and efficiency, capable of operating at low voltages.
Implementation Method 1
application of a differential potential between cathode, gate, other electrodes and anode planes causes the emission of electrons from the emission material
Data Source
AI summary
A substrate 200 is provided with conductive cathode tracks and a field electron emission material on the tracks. Septa 201 and pillars 202 are provided as raised elements over the emission material. An electrically insulating layer is formed over the emission material and raised elements 201, 202, such that boundary walls are formed in the insulating layer where it contacts the raised elements. The raised elements 201, 202 are then removed, to leave emitter cells and voids for other components, defined by the boundary walls with the insulating layer. A gate electrode is provided over the insulating layer.