Composite Bottom Interconnectors With Cavities for Stress Mitigation

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Solution Overview

Problem

The scaling down of semiconductor devices poses challenges in achieving improved quality, yield, performance, and reliability due to issues such as destructive stress forces during fabrication and operation.

Innovation Solution

The semiconductor device design incorporates a package structure with interposers and interconnectors of varying densities, featuring cavities that neutralize stress forces, allowing for flexible design rules and improved reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If semiconductor devices are scaled down to meet increasing computing demand, then device density and computing ability are improved, but destructive stress forces during fabrication and operation increase

Engineering Contradiction:

Improvecomputing abilityVSAvoiddestructive stress forces

Core Design Contradiction:

ProductivityVSObject-affected harmful factors

Solution Approach 1:

The patent introduces stress-compensating structures (cavities and compliant interconnector designs) during the fabrication stage to preemptively counteract the destructive stress forces that will arise during device operation. This allows continued scaling while protecting against stress-related failures.

Inventive Principle:

Principle #11Beforehand cushioning (Prior cushioning)

Solution Approach 2:

The patent modifies physical parameters of the interconnectors and package structure, such as introducing cavities to change stress distribution patterns and adjusting interconnector density, to reduce the impact of stress forces while maintaining device scaling benefits.

Inventive Principle:

Principle #35Parameter changes

2Ease of manufacture

If uniform density interconnectors are used across the package structure, then manufacturing is simplified, but design flexibility is reduced

Engineering Contradiction:

Improveinterconnector uniformityVSAvoiddesign flexibility

Core Design Contradiction:

Ease of manufactureVSAdaptability or versatility

Solution Approach 1:

The patent implements varying interconnector densities in different regions of the package structure, with higher density areas providing enhanced stress compensation and lower density areas maintaining manufacturing simplicity. This localized differentiation resolves the contradiction between uniformity and flexibility.

Inventive Principle:

Principle #3Local quality

Data Source

PatentUS11876075B2Semiconductor device with composite bottom interconnectors

Publication Date: 2024.01.16 NAN YA TECH

AI summary

The present application discloses a semiconductor device. The semiconductor device includes a package structure including a first side and a second side opposite to the first side; an interposer structure positioned over the first side of the package structure; a first die positioned over the interposer structure; a second die positioned over the interposer structure; and a plurality of bottom interconnectors positioned on the second side of the package structure, and respectively including: a bottom exterior layer positioned on the second side of the package structure; a bottom interior layer enclosed by the bottom exterior layer; and a cavity enclosed by the bottom interior layer.