Cavity Carrier Packaging for Coplanar Multi-Die Alignment
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Solution Overview
Problem
Semiconductor device packaging faces challenges in accommodating sophisticated features and applications while maintaining reliability, performance, and minimizing costs, as existing configurations often result in lower reliability and higher costs.
Innovation Solution
A multi-die semiconductor device with a cavity carrier is developed, utilizing a dual encapsulation process where a first encapsulant with cavities serves as a die attachment site and a second encapsulant encapsulates the dies and exposed portions of the first encapsulant, allowing for the accommodation of semiconductor dies with varying thicknesses and improving alignment accuracy through the use of rigid materials like cured epoxy molding compound, glass, or ceramic.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a single encapsulation process is used, then the manufacturing process is simple, but it cannot accommodate semiconductor dies with varying thicknesses and results in poor alignment accuracy
Solution Approach 1:
The encapsulation process is divided into two separate steps: first encapsulation and second encapsulation. The first encapsulation accommodates dies of varying thicknesses by providing cavities at different depths, while the second encapsulation provides uniform protection. This segmentation resolves the contradiction by improving alignment accuracy through staged processing while managing overall process complexity.
Solution Approach 2:
The first encapsulation is formed as a preliminary step before the second encapsulation. The cavities are pre-formed in the first encapsulant to accommodate specific die thicknesses, and die attachment sites are prepared in advance. This preliminary action enables precise alignment and accommodation of varied die thicknesses before the final encapsulation step.
2Adaptability or versatility
If dies with various thicknesses are accommodated, then versatility is improved, but maintaining coplanar active surfaces becomes difficult
Solution Approach 1:
The first encapsulant is designed with non-uniform cavities having different depths at different locations to match the varying thicknesses of different dies. Each cavity is locally optimized to accommodate a specific die thickness, allowing the active surfaces of all dies to be coplanar despite the dies having different thicknesses. This local quality approach resolves the contradiction between versatility and precision.
3Stability of the object's composition
If rigid materials are used for the first encapsulant, then warpage is reduced, but the material selection becomes more constrained
Solution Approach 1:
The patent employs a composite encapsulation structure where the first encapsulant uses rigid materials (such as cured epoxy molding compound, glass, quartz, or ceramic) for warpage resistance, while the second encapsulant can use different materials with appropriate coefficients of thermal expansion. This composite approach allows optimization of each layer for its specific function, resolving the contradiction between warpage resistance and material selection flexibility.
Data Source
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AI summary
A method of forming a semiconductor device is provided. The method includes forming a first cavity at a first major surface of a first encapsulant. A first semiconductor die is affixed on the first major surface of the first encapsulant and a second semiconductor die is affixed on a bottom surface of the first cavity. A second encapsulant encapsulates the first semiconductor die, the second semiconductor die, and at least exposed portions of the first major surface of the first encapsulant. A package substrate is formed on a first major surface of the second encapsulant. The package substrate includes conductive traces interconnected to the first semiconductor die and the second semiconductor die.