Microelectronic assemblies including cavity-less encapsulated dies
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Solution Overview
Problem
Multi-die IC packaging faces challenges due to increased complexity and reliability issues from using non-conductive films (NCF) as underfill materials, which trap inorganic fillers and require volatile surface finishes, leading to solder interconnect failures and manufacturing time constraints.
Innovation Solution
A microelectronic assembly design that encapsulates bridge dies in a substrate without cavities and uses capillary underfill materials instead of NCF, eliminating the need for volatile surface finishes and simplifying the manufacturing process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If non-conductive film (NCF) is used as underfill material, then solder bump interconnects can be formed, but inorganic fillers are trapped at the solder to conductive contact interface causing interconnect failures
Solution Approach 1:
The patent removes the NCF underfill material from the assembly, eliminating the source of inorganic filler contamination. The bridge die is directly bonded to the substrate without an intermediate NCF layer, thereby preventing filler trapping at the solder interface and improving interconnect reliability
Solution Approach 2:
The patent replaces the complex NCF material system with a simpler, volatile surface finish approach. The conductive contacts use a volatile surface finish (such as tin or lead-free solder) that provides necessary functionality temporarily during assembly but is eliminated in the final product, reducing complexity and harmful factors
2Productivity
If NCF material is used as underfill, then solder bumps can be formed, but manufacturing time is constrained due to volatile surface finish requirements
Solution Approach 1:
The patent uses a volatile surface finish on conductive contacts that provides necessary solderability during the assembly process but is designed to be temporary. This eliminates the need for time-consuming NCF lamination and curing processes, significantly reducing manufacturing timeframe while maintaining assembly functionality
Solution Approach 2:
By removing the NCF underfill material and its associated processing steps (lamination, alignment, curing), the patent streamlines the manufacturing process. The direct bonding approach eliminates multiple process steps and reduces overall manufacturing time
3Ease of manufacture
If NCF material is used as underfill, then bridge die can be assembled, but complex prep process and surface finish materials are required
Solution Approach 1:
The patent eliminates the NCF underfill material and its associated complex preparation processes. The bridge die assembly process is simplified by directly bonding the die to the substrate without requiring NCF lamination, alignment, or curing steps, thereby improving ease of manufacture
Solution Approach 2:
The patent replaces the complex NCF material system with a simpler volatile surface finish approach. The conductive contacts use a temporary surface finish that provides necessary functionality during assembly but is eliminated in the final product, reducing overall process complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Reduces manufacturing complexity and cost while enhancing reliability by preventing interconnect failures and allowing for more efficient assembly of multi-die IC packages.
Implementation Method 1
the interconnects include solder and are surrounded by a capillary underfill material
Data Source
AI summary
Microelectronic assemblies, related devices and methods, are disclosed herein. In some embodiments, a microelectronic assembly may include a substrate having a material and conductive pathways through the material, wherein the material includes an organic dielectric material; and a microelectronic component having a first surface and an opposing second surface, wherein the first surface of the microelectronic component is electrically coupled to the conductive pathways in the material by interconnects, wherein the interconnects include solder and are surrounded by a capillary underfill material, and wherein the microelectronic component and the capillary underfill material are surrounded by the material of the substrate.