Cavity-Mounted Semiconductor Package for Shorter Power Paths
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Solution Overview
Problem
Integrated circuits with high functionality require many input/output pads, leading to large package sizes, which is a challenge for miniaturization, and existing packaging technologies like Integrated Fan-Out (InFO) struggle to efficiently reduce the distance between electronic components and the substrate, affecting power integrity and performance.
Innovation Solution
A semiconductor package design that includes a cavity-mounted device, where a cavity is formed in a core substrate, and an electronic component is embedded within it, with redistribution layers formed over the substrate and component to reduce the distance between them, improving power integrity and performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If high functionality integrated circuits with many input/output pads are used, then functionality is improved, but package size increases
Solution Approach 1:
The patent transitions from planar packaging to three-dimensional packaging by forming a cavity within the substrate and embedding the electronic component vertically. This dimensional change allows multiple components to be stacked and interconnected in the vertical direction, achieving high functionality without increasing the horizontal package footprint.
Solution Approach 2:
The electronic component is embedded within a cavity formed in the substrate, creating a nested structure where the component is housed inside the substrate volume. This nesting approach maximizes space utilization and reduces the overall package size while accommodating multiple functional elements.
2Ease of manufacture
If conventional packaging is used, then manufacturing is simpler, but distance between electronic component and substrate is larger
Solution Approach 1:
The cavity is formed in the substrate before the electronic component is attached. This preliminary action of creating the cavity space allows the component to be positioned immediately adjacent to the substrate surface, minimizing the distance between them and improving power integrity without adding complex post-attachment structures.
3Reliability
If distance between electronic component and substrate is reduced, then power integrity is improved, but manufacturing complexity increases
Solution Approach 1:
The substrate and electronic component are merged into a single integrated structure through the cavity embedding process. The redistribution layers are formed to interconnect the component terminals directly with the substrate contact pads, combining multiple functions into a unified package structure that achieves short electrical paths without excessive manufacturing complexity.
Data Source
AI summary
A semiconductor package and methods of forming the same are disclosed. In an embodiment, a package includes a substrate; a first die disposed within the substrate; a redistribution structure over the substrate and the first die; and an encapsulated device over the redistribution structure, the redistribution structure coupling the first die to the encapsulated device.


