Cavity Package Substrate With Dual Redistribution for Double-Sided Terminals
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The semiconductor industry faces challenges in integrating high-density semiconductor devices with efficient redistribution structures that effectively couple double-sided electrical terminals to package substrates, while preventing reliability issues such as via/dielectric design failures.
Innovation Solution
A package substrate with a cavity hole embedding a semiconductor device, featuring dual redistribution structures on each side to electrically connect the device's terminals, utilizing a dielectric layer and conductive vias to form a robust interconnect system, and employing a method that includes surface preparation, plating, and patterning to create conductive traces and vias for reliable electrical coupling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional packaging methods are used for high-density semiconductor devices, then manufacturing simplicity is maintained, but integration density and electrical coupling efficiency deteriorate
Solution Approach 1:
The semiconductor device is embedded within a cavity hole in the package substrate, creating a nested structure where the device sits inside a recessed area. This nesting approach allows for better space utilization and higher integration density while maintaining a compact package form factor.
Solution Approach 2:
The patent introduces dual redistribution structures on both the first and second sides of the package substrate, transitioning from conventional single-sided interconnection to multi-dimensional electrical coupling. This enables efficient connection of double-sided electrical terminals by utilizing both surfaces of the substrate, thereby improving integration density without proportionally increasing complexity.
2Reliability
If single-sided redistribution structures are used, then device complexity is reduced, but electrical coupling efficiency of double-sided terminals deteriorates
Solution Approach 1:
The electrical interconnection function is segmented into two separate redistribution structures: a first redistribution structure on the first side of the substrate and a second redistribution structure on the second side. Each redistribution structure independently handles the electrical coupling for terminals on its respective side, improving overall electrical coupling efficiency for double-sided devices.
Solution Approach 2:
The package substrate is designed with universal functionality to support double-sided electrical terminals through its dual redistribution structures. The substrate can efficiently couple electrical terminals from both sides simultaneously, making it adaptable for various high-density semiconductor devices with double-sided connections.
3Reliability
If via/dielectric design is simplified, then manufacturing ease is improved, but reliability against via/dielectric failures deteriorates
Solution Approach 1:
The patent employs a careful via/dielectric design that anticipates potential failure modes. By properly designing the via structure and dielectric layer configuration before manufacturing, the structure provides built-in reliability against via/dielectric failures without requiring complex post-manufacturing corrections or overly complicated fabrication processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables enhanced integration capabilities and improved reliability by ensuring effective electrical coupling of double-sided semiconductor devices within the package substrate, addressing via/dielectric design challenges and enhancing the overall package substrate's performance.
Implementation Method 1
a conductive layer is formed on the insulation layer and on sidewalls of the through holes
Implementation Method 2
forming a dielectric layer along sidewalls, the first terminal side and the second terminal side of the semiconductor device
Data Source
AI summary
Embodiments provide a package substrate. The package substrate includes a substrate having a cavity hole therein, and a semiconductor device in the cavity hole. The semiconductor device has first terminal side and a second terminal side opposite to the first terminal side. The package substrate further includes a first redistribution structure on the first terminal side of the cavity substrate to electrically couple to a first pad and a second pad on the first terminal side of the semiconductor device; and a second redistribution structure on the second side of the cavity substrate to electrically couple to a third pad and fourth pad on the second terminal side of the semiconductor device.


