Cavity-Embedded Semiconductor Package for Compact Reliable Stacking
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Solution Overview
Problem
Conventional semiconductor packages face issues of excess cost, decreased reliability, and large package sizes, leading to inadequate performance.
Innovation Solution
A semiconductor device design comprising a substrate with a cavity, a device stack, internal interconnects, and an encapsulant, where the device stack is encapsulated within the cavity and connected to the substrate through internal interconnects, providing protection and electrical coupling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional semiconductor packages are used, then manufacturing cost is reduced, but reliability decreases and package size increases
Solution Approach 1:
The device stack is nested within a cavity formed in the substrate, with the encapsulant filling the cavity space. This nesting arrangement allows the device stack to be compactly housed within the substrate volume, reducing overall package size while maintaining structural integrity and reliability.
Solution Approach 2:
The package structure transitions from a planar layout to a three-dimensional configuration by stacking devices vertically within the cavity and using internal interconnects for electrical connections. This dimensional change reduces the footprint area while maintaining functionality, achieving smaller package size without sacrificing reliability.
2Productivity
If conventional semiconductor packages are used, then manufacturing simplicity is maintained, but performance decreases
Solution Approach 1:
The package is segmented into distinct functional components: substrate with cavity, device stack, internal interconnects, and encapsulant. This segmentation allows each component to be optimized independently for performance while simplifying the overall manufacturing process through modular assembly.
Solution Approach 2:
Internal interconnects serve as intermediaries between the device stack and external connections, enabling efficient electrical coupling without requiring complex external wiring. The encapsulant acts as an intermediary protective layer, simplifying the interface between the device stack and the external environment.
3Reliability
If device stack is encapsulated within cavity, then reliability is enhanced, but manufacturing complexity increases
Solution Approach 1:
The cavity is formed in the substrate before the device stack is assembled and placed within it. The encapsulant is then applied to enclose the device stack within the cavity. This preliminary formation of the cavity structure simplifies subsequent assembly steps and enhances reliability by ensuring proper device enclosure from the outset.
Data Source
AI summary
In one example, a semiconductor device can comprise a substrate, a device stack, first and second internal interconnects, and an encapsulant. The substrate can comprise a first and second substrate sides opposite each other, a substrate outer sidewall between the first substrate side and the second substrate side, and a substrate inner sidewall defining a cavity between the first substrate side and the second substrate side. The device stack can be in the cavity and can comprise a first electronic device, and a second electronic device stacked on the first electronic device. The first internal interconnect can be coupled to the substrate and the device stack. The encapsulant can cover the substrate inner sidewall and the device stack and can fill the cavity. Other examples and related methods are disclosed herein.


