Cavity Substrate Semiconductor Packaging for Compact Reliable Stacking

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Solution Overview

Problem

Conventional semiconductor packages face issues of excess cost, decreased reliability, and large package sizes, leading to suboptimal performance.

Innovation Solution

A semiconductor package design comprising a cavity substrate with a redistribution structure and a cavity layer, where a semiconductor die is positioned within the cavity and encapsulated with an encapsulant, allowing for efficient stacking and electrical coupling, and a method of fabrication that includes attaching semiconductor dies to exposed pads and encapsulating them in the cavity substrates.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional semiconductor packages are used, then manufacturing is simpler, but package size is too large and reliability is decreased

Engineering Contradiction:
Improvepackage reliabilityVSAvoidpackage size
Core Design Contradiction:
ReliabilityVSVolume of stationary object

Solution Approach 1:

The semiconductor die is nested within a cavity formed in the substrate, with the cavity layer encapsulating the die within the substrate structure. This nesting approach reduces the overall package volume while maintaining reliability through proper encapsulation and integration of components within the confined cavity space.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Productivity

If conventional semiconductor packages are used, then manufacturing process is traditional, but cost is excessive and performance is low

Engineering Contradiction:
Improvemanufacturing efficiencyVSAvoidmanufacturing cost
Core Design Contradiction:
ProductivityVSEase of manufacture

Solution Approach 1:

The package structure is segmented into distinct functional layers including the substrate, cavity layer, semiconductor die, and encapsulant, allowing for specialized manufacturing processes for each layer and optimized assembly. This segmentation enables more efficient manufacturing workflows and reduces overall production costs.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention transitions from traditional planar package layouts to a three-dimensional structure with the die positioned within a cavity, utilizing vertical space more efficiently. This dimensional change enables higher density packaging and improved electrical performance while reducing the footprint and enabling more cost-effective manufacturing for high-performance applications.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Productivity

If conventional packages are used, then design is simpler, but performance is relatively low

Engineering Contradiction:
Improveperformance efficiencyVSAvoidpackage structure complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The semiconductor die is nested within a cavity formed in the substrate, with the cavity layer encapsulating the die within the substrate structure. This nesting approach reduces the overall package volume while maintaining reliability through proper encapsulation and integration of components within the confined cavity space.

Inventive Principle:
Principle #7Nested doll (Nesting)

Data Source

PatentUS20250105165A1Semiconductor package using cavity substrate and manufacturing methods
Publication Date: 2025.03.27 AMKOR TECH SINGAPORE HLDG PTE LTD
  • US20250105165A1 patent drawing
  • US20250105165A1 patent drawing
  • US20250105165A1 patent drawing

AI summary

A semiconductor package includes a cavity substrate, a semiconductor die, and an encapsulant. The cavity substrate includes a redistribution structure and a cavity layer on an upper surface of the redistribution structure. The redistribution structure includes pads on the upper surface, a lower surface, and sidewalls adjacent the upper surface and the lower surface. The cavity layer includes an upper surface, a lower surface, sidewalls adjacent the upper surface and the lower surface, and a cavity that exposes pads of the redistribution structure. The semiconductor die is positioned in the cavity. The semiconductor die includes a first surface, a second surface, sidewalls adjacent the first surface and the second surface, and attachment structures that are operatively coupled to the exposed pads. The encapsulant encapsulates the semiconductor die in the cavity and covers sidewalls of the redistribution structure.