Semiconductor Package With Cavity Substrate for Density
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The semiconductor industry faces challenges in reducing the thickness and increasing the packaging density of 3D integrated circuit packages due to the vertical stacking of chips, which leads to increased package thickness and reduced space for active chips, especially when integrating multiple chips and passive devices.
Innovation Solution
A semiconductor package system is developed using a first substrate with a second substrate having a cavity, where the substrates are connected through an interconnect within the cavity, allowing a semiconductor device to be attached to either substrate, thereby reducing the package thickness and enhancing packaging density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multiple chips are stacked vertically to increase packaging density, then the horizontal space is reduced, but the package thickness increases
Solution Approach 1:
The patent transitions from traditional vertical stacking to a planar arrangement where chips are mounted on separate substrates positioned side-by-side within the same package. This dimensional reorganization allows multiple chips to coexist in the horizontal plane rather than stacking vertically, thereby increasing packaging density without increasing package thickness.
2Adaptability or versatility
If passive devices are attached to the main substrate, then additional functionality is integrated, but the space available for active chips is reduced
Solution Approach 1:
The patent divides the package into multiple independent substrates, with each substrate dedicated to specific active chips. Passive devices are attached to these separate substrates rather than competing for space on a single main substrate. This segmentation allows active and passive components to coexist without spatial conflict, as each substrate can be optimized for its specific component type.
3Quantity of substance
If more chips are integrated in a limited space, then packaging density increases, but the package footprint is reduced
Solution Approach 1:
The patent employs multiple substrates of different sizes that can be nested or arranged within the package footprint. Smaller substrates carrying passive devices or auxiliary components can be positioned within or adjacent to larger substrates carrying active chips. This nesting approach maximizes the utilization of the package footprint area, allowing more chips to be integrated without increasing the overall package footprint.
Data Source
AI summary
A method of manufacturing a semiconductor package system includes: providing a first substrate; providing a second substrate having a cavity, the second substrate being attached to the first substrate; connecting the first substrate to the second substrate using an interconnect, the interconnect being in the cavity; and attaching a semiconductor device to the first substrate or the second substrate.