Cavity Wiring Substrate With Roughened Pads for Reliable Component Bonding

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Solution Overview

Problem

There is a demand for improving the connection reliability between electronic components and conductive pads exposed at the bottom of a cavity in wiring substrates.

Innovation Solution

A wiring substrate design that includes a first wiring layer, a first insulating layer, multiple insulating layers, a cavity, a surface-processed layer, an electronic component, a filling insulating layer, and a third wiring layer, with the side surface of the second wiring layer featuring a first roughened surface and the upper surface having a greater surface roughness than the first, enhancing electrical connections.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the conductive pads are exposed at the bottom of the cavity with smooth surfaces, then the manufacturing process is simple, but the connection reliability between electronic components and conductive pads is insufficient

Engineering Contradiction:
Improveconnection reliabilityVSAvoidsurface processing complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies parameter changes by modifying the surface roughness parameter of the conductive pads. The second wiring layer surfaces are intentionally roughened with specific roughness values (Ra: 0.5-5μm for side surfaces, 1-10μm for upper surfaces) to enhance connection reliability. This parameter change resolves the contradiction by improving electrical connection reliability through increased surface roughness while maintaining a relatively simple manufacturing process using conventional roughening techniques.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent applies local quality by creating different surface roughness characteristics at different locations of the second wiring layer. The upper surface has greater roughness (Ra: 1-10μm) compared to the side surface (Ra: 0.5-5μm), optimizing adhesion for electronic component mounting at the upper surface while maintaining appropriate properties for lateral connections. This local differentiation resolves the contradiction by providing enhanced connection reliability where needed without unnecessarily complicating the entire structure.

Inventive Principle:
Principle #3Local quality

2Reliability

If the surface roughness of conductive pads is increased to improve adhesion, then the connection reliability improves, but the manufacturing precision requirements increase

Engineering Contradiction:
Improveadhesion strengthVSAvoidsurface roughness control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent specifies concrete parameter ranges for surface roughness (Ra: 0.5-5μm for side surfaces, 1-10μm for upper surfaces) to optimize adhesion while maintaining manufacturability. These parameter specifications resolve the contradiction by providing clear manufacturing targets that balance adhesion improvement with controllable precision requirements, avoiding excessive roughness that would be difficult to manufacture.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The roughening process is performed on the second wiring layer before forming the cavity and mounting electronic components. This preliminary action ensures that the surface roughness is established early in the manufacturing process, making it easier to control and maintain the desired adhesion properties throughout subsequent manufacturing steps without requiring precise control during later operations.

Inventive Principle:
Principle #10Preliminary action

3Ease of operation

If the cavity is formed deep enough to expose the second wiring layer, then the electronic component can be mounted, but the insulating layers must be removed increasing complexity

Engineering Contradiction:
Improveelectronic component mountingVSAvoidcavity formation complexity
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The second wiring layer is roughened before the cavity is formed, allowing the roughening process to be performed on a solid, intact structure rather than attempting to roughen surfaces after cavity formation. This preliminary action simplifies the overall process by avoiding the need to navigate complex cavity geometries during surface treatment, reducing manufacturing complexity while enabling proper electronic component mounting.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The cavity is formed to expose specific portions of the second wiring layer (upper surface and side surfaces) while leaving other portions covered by insulating layers. This selective exposure provides local quality by exposing only the areas needed for electronic component mounting and electrical connections, minimizing the complexity of cavity formation while achieving the necessary mounting functionality.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design improves the connection reliability between electronic components and conductive pads by increasing surface roughness, thereby enhancing the electrical connectivity and adhesion.

Implementation Method 1

The side surface of the second wiring layer includes a first roughened surface. The upper surface of the second wiring layer includes a second roughened surface having a greater surface roughness than the first roughened surface.

Methodology Applied
Scientific EffectSurface roughening: Abrasion

Data Source

PatentUS20260047010A1Wiring substrate
Publication Date: 2026.02.12 SHINKO ELECTRIC IND CO LTD
  • US20260047010A1 patent drawing
  • US20260047010A1 patent drawing
  • US20260047010A1 patent drawing

AI summary

A wiring substrate includes a first wiring layer, a first insulating layer, a second wiring layer electrically connected to the first wiring layer, “N” layers (“N” is a natural number of 1 or greater) of insulating layers including a second insulating layer, a cavity formed through the “N” layers of insulating layers and exposing an upper surface and a side surface of the second wiring layer, a surface-processed layer covering the upper surface and the side surface of the second wiring layer, an electronic component mounted on the surface-processed layer, a filling insulating layer filling the cavity and covering the electronic component, and a third wiring layer electrically connected to the electronic component. The side surface of the second wiring layer includes a first roughened surface, and the upper surface of the second wiring layer includes a second roughened surface having a greater surface roughness than the first roughened surface.