Cavity Packaging Substrate With Elastic Layer for Thermal Stress Buffering
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Solution Overview
Problem
Current semiconductor packaging technologies face challenges in achieving thermomechanical reliability and long-term durability due to mismatched thermal expansion coefficients between semiconductor elements and substrates, leading to stress-induced breakage and electrical connection failures during heating and cooling processes.
Innovation Solution
A packaging substrate design featuring a cavity region with an elastic layer having a specific elastic modulus and thermal expansion coefficient, disposed adjacent to the side surface of the cavity, which buffers thermal stress and includes a redistribution layer and buffer layer to manage thermal expansion mismatches between the core substrate and main board.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If a rigid substrate (ceramic or glass) is used to provide structural stability, then mechanical strength is improved, but thermal stress resistance deteriorates due to mismatched thermal expansion coefficients
Solution Approach 1:
The patent employs a composite structure consisting of a rigid core substrate (ceramic or glass) combined with an elastic layer (resin material). This composite design allows the rigid substrate to provide mechanical strength while the elastic layer absorbs thermal stress, resolving the contradiction between structural stability and thermal stress resistance
Solution Approach 2:
The patent changes the physical parameters of the packaging substrate by introducing an elastic layer with specific elastic modulus (1-10 GPa) and thermal expansion coefficient (30-70 ppm/°C) values. This parameter optimization enables the substrate to maintain rigidity while accommodating thermal expansion mismatches
2Reliability
If a soft elastic layer is introduced to buffer thermal stress, then thermal stress resistance is improved, but mechanical strength deteriorates
Solution Approach 1:
The patent creates a composite material system where the elastic layer (resin) is combined with the rigid core substrate. The elastic layer provides thermal stress buffering while the core substrate maintains overall mechanical strength, achieving both requirements simultaneously
Solution Approach 2:
The elastic layer is selectively applied only in the cavity region where semiconductor elements are mounted, providing localized thermal stress buffering exactly where needed, while the rest of the rigid substrate maintains its full mechanical strength
3Volume of stationary object
If the cavity region is deeply recessed to accommodate elements, then element accommodation capacity is improved, but structural stability deteriorates
Solution Approach 1:
The elastic layer acts as a flexible film that lines the cavity region, providing structural support to the recessed area. This allows deep cavity formation for element accommodation while the elastic layer prevents structural collapse and maintains overall substrate stability
4Reliability
If the elastic layer thickness is increased to improve stress buffering, then thermal stress resistance is improved, but manufacturing precision deteriorates due to difficulty in controlling thin layer formation
Solution Approach 1:
The patent optimizes the elastic layer thickness within a specific range (1-50 μm) to achieve the balance between stress buffering capability and manufacturing feasibility. This parameter optimization ensures sufficient stress absorption while maintaining controllability in the manufacturing process
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides superior thermomechanical reliability and long-term durability by stabilizing semiconductor elements within the packaging substrate, reducing stress and preventing breakage and electrical connection failures, even under high-temperature conditions.
Implementation Method 1
mismatched thermal expansion coefficients between semiconductor elements and substrates, leading to stress-induced breakage
Implementation Method 2
an elastic layer having a specific elastic modulus and thermal expansion coefficient, disposed adjacent to the side surface of the cavity
Data Source
Figure 1a
Figure 1b
Figure 2
AI summary
A packaging substrate according to an embodiment includes a cavity region in which an element is accommodated, and a core substrate in which the cavity region is disposed. The cavity region includes an accommodation portion that is a space formed by recessing a portion of the core substrate, a side surface that is formed on an inner side in a thickness direction of the core substrate and forms an outer periphery of the accommodation portion, and an elastic layer disposed adjacent to the side surface. An elastic modulus of the elastic layer is 2 GPa to 15 GPa. The packaging substrate may have excellent thermomechanical reliability and long-term durability.