Cavity Substrate Filling Layout to Reduce Semiconductor Warpage

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Solution Overview

Problem

The increasing number of electronic components in semiconductor chips leads to larger package sizes, and the use of embedded substrates with cavities and filling materials to address this issue often results in warpage due to coefficient of thermal expansion (CTE) mismatch between the filling materials and the electronic components.

Innovation Solution

A semiconductor substrate structure is designed with a substrate defining a cavity, an electronic device disposed within the cavity, and a filling material that covers a portion of the electronic device's upper surface, including a protrusion that engages with an extending portion of a dielectric layer. This configuration reduces warpage by minimizing the contact area between the filling material and the electronic device, thereby reducing CTE mismatch effects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If filling material is used to fill gaps between electronic components and substrate, then package size is reduced, but warpage occurs due to CTE mismatch

Engineering Contradiction:
Improvepackage sizeVSAvoidwarpage
Core Design Contradiction:
Volume of moving objectVSStability of the object's composition

Solution Approach 1:

The filling material is selectively applied to cover only a first region of the upper surface of the electronic device, rather than the entire surface. This localized filling approach reduces the overall contact area between the filling material and the electronic device, thereby minimizing the CTE mismatch effects that cause warpage while still providing gap filling functionality in critical areas.

Inventive Principle:
Principle #3Local quality

2Strength

If filling material covers large area of electronic device, then adhesion is improved, but CTE mismatch warpage increases

Engineering Contradiction:
ImproveadhesionVSAvoidwarpage
Core Design Contradiction:
StrengthVSStability of the object's composition

Solution Approach 1:

The filling material is selectively applied to cover only a first region of the upper surface of the electronic device, rather than the entire surface. This localized filling approach reduces the overall contact area between the filling material and the electronic device, thereby minimizing the CTE mismatch effects that cause warpage while still providing gap filling functionality in critical areas.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The proposed solution effectively reduces warpage in semiconductor substrate structures by improving adhesion between the filling material and the substrate, while maintaining reduced contact with the electronic device, thus enhancing the reliability of the semiconductor substrate structure.

Implementation Method 1

applying a filling material into the gap via the first inlet end and the second inlet end

Methodology Applied
Scientific EffectCapillary action: Capillary Action

Data Source

PatentUS12315797B2Semiconductor substrate structure and method of manufacturing the same
Publication Date: 2025.05.27 ADVANCED SEMICON ENG INC
  • US12315797B2 patent drawing
  • US12315797B2 patent drawing
  • US12315797B2 patent drawing

AI summary

A semiconductor substrate structure and a method of manufacturing a semiconductor substrate structure are provided. The semiconductor substrate structure includes a substrate, an electronic device, and a filling material. The substrate defines a cavity. The electronic device is disposed in the cavity and spaced apart from the substrate by a gap. The filling material is disposed in the gap and covers a first region of an upper surface of the electronic device.