Continuous Bandwidth Latency Critical Arbitration for Packetized Data

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Solution Overview

Problem

Existing communication systems face challenges in efficiently arbitrating access between multiple high-bandwidth ingress channels and a single lower-bandwidth egress channel, leading to latency issues and inefficient data transmission.

Innovation Solution

The Continuous Bandwidth Latency Critical (CBLC) Quality of Service (QoS) arbitration system calculates rank values for each source buffer on a word-to-word basis, intentionally corrupts or cuts packets if a source loses priority, and employs a weighted priority randomized scheduler to ensure fair bandwidth access and minimize latency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If whole packets are transmitted from selected input channel to output channel after arbitration decisions are completed, then data transmission integrity is maintained, but transmission latency increases and bandwidth utilization becomes inefficient

Engineering Contradiction:
Improvedata transmission integrityVSAvoidtransmission latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent segments packets into individual data words for independent transmission. Instead of transmitting entire packets as atomic units, the arbitration system processes and transmits data word-by-word from multiple input channels through the crossbar switch to the output channel, enabling finer-grained control and reduced latency while maintaining data integrity through reassembly at the output.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements dynamic arbitration that can change mid-packet transmission. The system continuously recalculates arbitration decisions based on current buffer ranks and bandwidth requirements, allowing it to switch between different input channels dynamically during packet transmission rather than committing to a single channel for the entire packet duration.

Inventive Principle:
Principle #15Dynamics

2Ease of operation

If multiple high bandwidth ingress channels are arbitrated to a single lower bandwidth egress channel using traditional packet-based arbitration, then channel access control is simplified, but bandwidth utilization becomes inefficient and latency increases

Engineering Contradiction:
Improvechannel access controlVSAvoidbandwidth utilization
Core Design Contradiction:
Ease of operationVSProductivity

Solution Approach 1:

The patent changes the granularity parameter of arbitration from packet-level to data-word-level. This parameter change enables the system to allocate bandwidth in fine increments matching the actual data flow requirements, improving bandwidth utilization efficiency while the continuous rank calculation and decay mechanism maintains straightforward access control through automated priority management.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20240414096A1System and method for latency critical quality of service using continuous bandwidth control
Publication Date: 2024.12.12 DRW INNOVATIONS LLC
  • US20240414096A1 patent drawing
  • US20240414096A1 patent drawing
  • US20240414096A1 patent drawing

AI summary

A system and method are provided for a bandwidth manager for packetized data designed to arbitrate access between multiple, high bandwidth, ingress channels (sources) to one, lower bandwidth, egress channel (sink). The system calculates which source to grant access to the sink on a word-to-word basis and intentionally corrupts/cuts packets if a source ever loses priority while sending. Each source is associated with a ranking that is recalculated every data word. When a source buffer sends enough words to have its absolute rank value increase above that of another source buffer waiting to send, the system “cuts” the current packet by forcing the sending buffer to stop mid-packet and selects a new, lower ranked, source buffer to send. When there are multiple requesting source buffers with the same rank, the system employs a weighted priority randomized scheduler for buffer selection.