Packet Transport Network CBR Signal Timing Synchronization

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Solution Overview

Problem

Current packet transport networks face challenges in transporting constant bit rate (CBR) client signals over arbitrary distances without a common hardwired reference clock, leading to issues with phase and frequency information loss and increased processing requirements.

Innovation Solution

The method involves synchronizing reference clocks and time of day (ToD) at ingress and egress network nodes using a packet-based time distribution mechanism, assembling Ethernet frame packets with variable payload sizes, and including presentation time packets to maintain timing information, allowing for independent synchronization and accurate reassembly of CBR client streams across the network.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a common hardwired reference clock is used to synchronize ingress and egress network nodes, then phase and frequency information can be maintained, but the system requires nodes to be in reasonable proximity and reduces network flexibility

Engineering Contradiction:
Improvephase and frequency information maintenanceVSAvoidnetwork flexibility and node placement
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent introduces a packet-based time distribution mechanism as an intermediary to transmit timing information between ingress and egress nodes. Instead of direct hardwired clock connection, timing data is carried through packet streams, allowing nodes to be geographically separated while maintaining synchronization through the packet medium.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent replaces the mechanical/electrical hardwired reference clock connection with a packet-based digital timing distribution system. Timing information is embedded in packet data streams and processed digitally, eliminating the need for physical clock signal cables and enabling flexible node placement.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Loss of information

If timestamping is used to signal phase and frequency information, then timing data can be transmitted, but additional processing requirements increase and bandwidth is reduced

Engineering Contradiction:
Improvephase and frequency information transmissionVSAvoidprocessing requirements
Core Design Contradiction:
Loss of informationVSDevice complexity

Solution Approach 1:

The patent merges the timing information transmission with the existing packet data stream. Instead of separate timestamp packets or fields requiring dedicated processing, timing data is integrated into the packet structure itself, allowing simultaneous data and timing transmission without additional processing overhead.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The packet structure is designed to serve multiple functions simultaneously: carrying client data, transmission control information, and timing/phase/frequency reference data. This multi-functionality eliminates the need for separate processing paths for timing information.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Device complexity

If timing techniques with fixed packet sizes are used, then packet assembly is simplified, but packet delay variation increases

Engineering Contradiction:
Improvepacket assembly complexityVSAvoidpacket delay variation
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent implements dynamic packet assembly where packet sizes and composition are adjusted based on timing requirements and network conditions. The system can vary packet parameters to optimize both assembly simplicity and delay characteristics, rather than using fixed rigid structures.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes packet parameters (size, timing, composition) dynamically to balance assembly complexity and delay variation. By adjusting these parameters based on real-time requirements, the system achieves simplified assembly without sacrificing timing reliability.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11239933B2Systems and methods for transporting constant bit rate client signals over a packet transport network
Publication Date: 2022.02.01 MICROSEMI SEMICON
  • US11239933B2 patent drawing
  • US11239933B2 patent drawing
  • US11239933B2 patent drawing

AI summary

A method for transporting Ethernet frame packets assembled from a constant bit rate (CBR) client stream from an ingress network node to an egress network node, each Ethernet frame packet including a payload region having a number of bytes of CBR client data from the CBR client stream determined by a client rate value of the CBR client stream. The method including synchronizing a reference clock signal and a ToD in the ingress network node to a packet-based time distribution mechanism, independently synchronizing a reference clock signal and a ToD in the egress network node to the packet-based time distribution mechanism, for an Ethernet frame packet assembling a presentation time packet including a sequence number and a presentation ToD for the Ethernet frame packet, and transmitting the Ethernet frame packets and the presentation time packet to the egress network node over the packet transport network.