CBRAM Algorithm Selection for Stochastic Failure Reduction
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Solution Overview
Problem
Conventional non-volatile memory technologies, such as flash memory, face limitations in programming current and physical degradation over time, while resistive RAM (ReRAM) and conductive bridging RAM (CBRAM) offer low power and high speeds but struggle with stochastic program and erase operation failures and inefficiencies.
Innovation Solution
A method for controlling programmable impedance elements in ReRAM and CBRAM involves decoding bits in a register to select operation algorithms, determining option variables for program and erase operations, and executing these operations to improve algorithm efficiency and reliability, allowing for symmetric program and erase operations without the need for charge pumps.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional flash memory programming is used, then non-volatile storage is achieved, but high programming current and physical degradation over time occur
Solution Approach 1:
The patent changes the fundamental programming mechanism from charge trapping (flash memory) to conductive filament formation (CBRAM/ReRAM). This involves changing the physical state and conduction mechanism parameters, enabling low-current programming through ionic migration and electrochemical reactions rather than high-current electron injection, thus resolving the contradiction between programming current and reliability
Solution Approach 2:
The patent replaces the mechanical wear-based flash memory programming (charge pump, tunnel oxide stress) with an electrochemical field-based mechanism (ionic migration, filament formation). This substitution eliminates physical degradation mechanisms while maintaining non-volatile storage, resolving the contradiction between durability and energy consumption
2Productivity
If ReRAM/CBRAM is used, then low power and high speeds are achieved, but stochastic program and erase operation failures occur
Solution Approach 1:
The patent introduces dynamic algorithm selection that adapts to cell state and operation history. The system dynamically switches between different programming and erasing algorithms based on real-time feedback, enabling reliable operation across varying conditions while maintaining high speed performance, thus resolving the contradiction between productivity and reliability
Solution Approach 2:
The patent implements feedback mechanisms where operation results are monitored and used to select subsequent algorithms. This closed-loop control ensures stochastic failures are corrected by retrying with different algorithms, guaranteeing operation success while maintaining overall high speed performance
3Loss of energy
If ReRAM/CBRAM is used, then low power consumption is achieved, but inefficiencies in program and erase operations remain
Solution Approach 1:
The patent employs dynamic algorithm selection that optimizes for both energy efficiency and operation speed. By selecting the most appropriate algorithm based on cell state and operation type, the system achieves efficient program and erase operations with minimal energy loss while maintaining high productivity
Solution Approach 2:
The patent changes operational parameters including pulse width, voltage amplitude, and algorithm selection to optimize the balance between energy consumption and operation efficiency. These parameter adjustments enable efficient operations that minimize energy loss while maintaining high productivity
Data Source
AI summary
Structures and methods for controlling operation of a programmable impedance element are disclosed herein. In one embodiment, a method of controlling a programmable impedance element can include: (i) receiving a program or erase command to be executed on the programmable impedance element; (ii) selecting an operation algorithm for executing the command, where the operation algorithm is selected from among a plurality of operation algorithms by decoding at least two bits stored in a register; (iii) determining, using the register, a plurality of option variables for the selected operation algorithm, where the option variables are used to set conditions for one or more of a plurality of program and erase operations of the selected operation algorithm; and (iv) executing the command on the programmable impedance element by performing the one or more of the plurality of program and erase operations of the selected operation algorithm.


