Coherent Multi-Chip Interconnect Using Segmented Data Encoding
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Solution Overview
Problem
Current network processors face challenges in maintaining coherence and efficient communication between multiple system-on-chips (SOCs) across a network, particularly in scheduling and queuing packet processing operations for upper-level network protocols, which affects the optimization of networked devices.
Innovation Solution
The implementation of a cross-chip interconnect (CCI) protocol that enables coherent communication between SOCs by generating data messages, dividing them into alternating even and odd data words, encoding grouped slices, and transmitting metaframes across output ports, using a 38b/40b encoding scheme, and maintaining virtual channel credit counts for reliable data transmission.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data is transmitted between multiple SOCs using conventional network protocols, then network communication functionality is achieved, but transmission latency increases and coherence is lost
Solution Approach 1:
The data stream is segmented into fixed-size data words, which are further divided into alternating even and odd slices. This segmentation enables parallel processing and transmission across multiple output ports, reducing latency while maintaining data integrity and coherence between SOCs.
Solution Approach 2:
The patent employs periodic encoding using 38b/40b encoding scheme applied alternately to even and odd data words. This periodic structure creates a rhythmic transmission pattern that simplifies synchronization and timing recovery, reducing latency while ensuring reliable coherent communication.
2Productivity
If data words are divided into slices and distributed across multiple output ports, then transmission efficiency increases, but encoding complexity increases
Solution Approach 1:
Data words are segmented into even and odd slices that are distributed across multiple output ports. This segmentation enables parallel transmission, improving productivity. The alternating pattern simplifies the encoding process compared to encoding entire data words, as each slice can be encoded independently using the 38b/40b scheme.
Solution Approach 2:
Instead of encoding complete data words, the patent applies encoding only to alternating even and odd slices. This partial action approach reduces the total encoding complexity while maintaining sufficient data integrity for reliable transmission, as not all bits require full encoding treatment.
3Reliability
If virtual channel credit counts are maintained for reliable transmission, then transmission reliability improves, but processing overhead increases
Solution Approach 1:
The patent implements feedback mechanisms through credit count maintenance for each virtual channel. Receivers send credit information back to transmitters, enabling flow control and reliable transmission. This feedback loop ensures that data is only transmitted when the receiver is ready, improving reliability while the structured credit system keeps processing overhead manageable.
Data Source
AI summary
In one embodiment, a data message is generated at a first system-on-chip (SOC) for transmission to a second SOC. A stream of data words is generated from the data message, the data words alternating between even and odd data words. Each data word in the stream of data words is divided into a first pattern of slices for even data words and a second pattern of slices for odd data words, with the slices distributed across plural output ports at the first SOC. At each output port, two slices from two successive cycles are grouped. The grouped slices are encoded using an encoding scheme to produce an N-bit symbol at M-bits per cycle, alternating between high and low parts of the encoding. Plural metaframes are generated from a stream of symbols and the metaframes for each of the output ports are transmitted to the second SOC.