CDAC Reference Voltage Compensation for High-Speed SAR ADCs
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Solution Overview
Problem
Conventional SAR ADC devices face challenges in maintaining reference voltage stability due to voltage drops during capacitive switching, especially at higher speeds, which complicates meeting the shorter settle time requirements.
Innovation Solution
The integration of a capacitive digital-to-analog converter with a reference voltage providing circuit and a compensation circuit that predicts and generates compensation signals to minimize voltage drops by estimating charge amounts drawn from the reference voltage, using a larger capacitance and operational amplifiers to rapidly restore the voltage level.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional CDAC performs capacitor switching to convert digital signal to analog signal, then digital-to-analog conversion function is achieved, but voltage drop occurs in reference voltage signal which lowers the reference voltage level
Solution Approach 1:
The compensation circuit predicts the charge amount that will be drawn from the reference voltage during capacitor switching and generates a compensation charge amount in advance or simultaneously to offset the voltage drop. This preliminary action prevents the reference voltage from significantly dropping during the conversion process.
Solution Approach 2:
The compensation circuit monitors the capacitor switching events in the CDAC and responds by generating appropriate compensation charge amounts. This feedback mechanism ensures that the reference voltage remains stable by continuously adjusting the compensation based on the actual switching activity.
2Stability of the object's composition
If conventional voltage provider circuit slowly raises up the reference voltage level after voltage drop, then reference voltage is restored, but settle time becomes too long to meet high-speed operation requirements
Solution Approach 1:
Instead of waiting for the voltage drop to occur and then slowly restoring it, the compensation circuit generates the compensation charge amount simultaneously with or in advance of the capacitor switching event. This preliminary action eliminates the slow restoration phase and maintains the reference voltage stable throughout the conversion process.
Solution Approach 2:
The compensation circuit changes the charge amount parameter dynamically based on the capacitor switching events. By adjusting the compensation charge amount in real-time according to the switching activity, the circuit maintains reference voltage stability without requiring slow gradual restoration.
3Speed
If capacitor switching is performed frequently for high-speed operation, then conversion speed is improved, but voltage drop occurs more frequently making it difficult to meet settle time requirements
Solution Approach 1:
The compensation circuit provides continuous feedback-based compensation for each capacitor switching event. By monitoring and responding to each switching event individually, the circuit maintains reference voltage stability even during frequent high-speed operations, eliminating the need for long settle times between conversions.
Solution Approach 2:
The compensation charge amount is generated in advance or simultaneously with each capacitor switching event, preventing voltage drops before they occur. This approach allows frequent switching operations without compromising reference voltage stability or requiring extended settle times.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively minimizes voltage drops and reduces power consumption, ensuring the reference voltage remains within tolerable error correction levels during bit conversions, even at higher speeds, thus enhancing the performance and efficiency of SAR ADC devices.
Implementation Method 1
generating a compensation signal into the reference voltage input of the capacitive digital-to-analog converter in response to at least one switching of at least one capacitor
Implementation Method 2
one or more capacitors in the conventional CDAC perform level switching. This inevitably causes a voltage drop occurring in the reference voltage signal
Data Source
AI summary
A method of an electronic device includes: providing a capacitive digital-to-analog converter having a reference voltage input; providing a reference voltage providing circuit to generate a reference voltage to the reference voltage input of the capacitive digital-to-analog converter; and, generating a compensation signal into the reference voltage input of the capacitive digital-to-analog converter in response to at least one switching of at least one capacitor in a switchable capacitor network of the capacitive digital-to-analog converter.