CDC Synchronization Mutation for Verification Robustness

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Solution Overview

Problem

Current circuit verification methods often fail to adequately cover synchronization circuitry handling clock-domain-crossing (CDC) signals, leading to potential data integrity issues and significant financial impacts, as seen in cases like the floating-point division circuit bug.

Innovation Solution

The introduction of design mutations in synchronization circuitry that modify its behavior, allowing verification tests to determine if the CDC signals are properly synchronized, by activating specific mutations that simulate either correct or incorrect silicon behavior, thereby assessing the robustness of verification tests.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If design mutations are added to synchronization circuitry to improve verification coverage, then verification robustness is improved, but device complexity increases

Engineering Contradiction:

Improveverification robustnessVSAvoidcircuit design complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The verification process is segmented into multiple independent mutation types (bypass mutation, glitch mutation, pulse mutation, hold mutation) that can be applied separately to different parts of the synchronization circuitry. This allows verification coverage to be improved incrementally without overwhelming complexity.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent introduces configurable parameters in the mutation circuitry such as glitch width, pulse width, and mutation activation flags. These parameters can be adjusted to control the behavior of mutations, allowing verification to be tuned without permanently altering the base circuit design.

Inventive Principle:

Principle #35Parameter changes

2Measurement precision

If multiple types of design mutations are implemented to cover more silicon behaviors, then measurement precision of verification is improved, but ease of operation deteriorates

Engineering Contradiction:

Improveverification coverage accuracyVSAvoidverification test application

Core Design Contradiction:

Measurement precisionVSEase of operation

Solution Approach 1:

The mutation circuitry is designed with universal control mechanisms that can activate different mutation types through a unified interface. The same basic mutation blocks can produce different effects (bypass, glitch, pulse, hold) by changing control signals, reducing the operational complexity despite multiple mutation types.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

The verification system automatically manages the complexity of multiple mutations by implementing self-contained mutation modules that handle their own configuration and activation. Each mutation type is encapsulated with its own control logic, reducing the burden on external verification processes.

Inventive Principle:

Principle #25Self-service

Data Source

PatentUS9990453B2Clock-domain-crossing specific design mutations to model silicon behavior and measure verification robustness

Publication Date: 2018.06.05 SYNOPSYS INC

AI summary

Methods and apparatuses related to clock-domain-crossing (CDC) specific design mutations to model silicon behavior and measure verification robustness are described. CDC signal paths can be identified in a circuit design. Next, synchronization circuitry associated with the CDC signal paths can be identified. Design mutations can be added to the identified synchronization circuitry. The design mutations can then be used during functional verification to measure verification robustness of a circuit verification test suite.