Clock Domain Crossing Verification Using Parameter Inference

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Solution Overview

Problem

Conventional clock-domain crossing (CDC) verification techniques in electronic design automation require generating numerous abstract models for all possible combinations of parameter values, leading to increased computational resources and time consumption, especially as design complexity grows.

Innovation Solution

Identifying 'do-not-care' (DNC) parameters that do not impact CDC verification, allowing these parameters to be excluded from model generation, thereby reducing the number of abstract models needed and streamlining the verification process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional CDC verification techniques generate abstract models for all possible combinations of parameter values, then verification completeness is improved, but computational resources and time consumption increase

Engineering Contradiction:
Improveverification completenessVSAvoidtime consumption
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent extracts and identifies DNC parameters from the set of all parameters by analyzing their usage in the design. These DNC parameters are then excluded from model generation, taking out the unnecessary computational burden while preserving verification completeness for parameters that actually impact CDC behavior.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the state of parameter handling by categorizing parameters into DNC and non-DNC groups. This parameter classification transforms the verification approach from exhaustive generation of all parameter combinations to selective generation only for parameters that affect CDC verification, thereby reducing computational resources and time consumption.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If conventional CDC verification techniques generate abstract models for all possible combinations of parameter values, then verification completeness is improved, but computational resources increase

Engineering Contradiction:
Improveverification completenessVSAvoidcomputational resources
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent extracts DNC parameters from the complete parameter set through usage analysis and excludes them from model generation. This extraction removes unnecessary computational workload while maintaining verification completeness for parameters that truly impact CDC behavior.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent transforms the parameter handling strategy by classifying parameters into DNC and non-DNC categories. This parameter state change enables selective model generation, reducing computational resources and energy consumption while preserving verification thoroughness.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If all parameter values are varied during model generation, then design coverage is improved, but device complexity increases

Engineering Contradiction:
Improvedesign coverageVSAvoidmodel complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts DNC parameters from the design and excludes them from model generation variations. This extraction reduces the number of models that need to be generated and analyzed, thereby reducing device complexity while maintaining design coverage for parameters that affect CDC behavior.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the approach to parameter variation by classifying parameters into DNC and non-DNC groups. This parameter classification reduces model complexity by limiting variations to only those parameters that impact CDC verification, while preserving comprehensive design coverage.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11087059B2Clock domain crossing verification of integrated circuit design using parameter inference
Publication Date: 2021.08.10 SYNOPSYS INC
  • US11087059B2 patent drawing
  • US11087059B2 patent drawing
  • US11087059B2 patent drawing

AI summary

Techniques for verification of integrated circuit design are disclosed. A design relating to an integrated circuit is received (102). The design includes a first parameterized element and a second parameterized element (104). The first parameterized element is identified as a do-not-care (DNC) element based on usage of the first parameterized element in the design (106). A plurality of models relating to the design are generated by a processing device (110). A first value of the first parameterized element is not varied during the generating, based on the identification of the first parameterized element as a DNC element (108). A second value of the second parameterized element is varied during the generating (108).