Charge-Domain Filter Pulse-Width Control for Gain and DC Stability

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Solution Overview

Problem

Charge-domain filters (CDFs) face issues with gain variation and direct current (DC) offset due to process variations, which can affect the performance of variable gain amplifiers and sampling pulses, leading to unstable filtering effects.

Innovation Solution

A CDF with a switched-capacitor network and a clock generator that adjusts phase differences and pulse widths of clock signals using control signals to maintain constant gain and stable DC levels, compensating for process variations by adjusting pulse widths without altering the default pulse width of the clock signals.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the CDF performs charge samplings with fixed pulse width, then the filtering effect is determined by capacitor size ratios, but process variation leads to gain variation and DC offset

Engineering Contradiction:
Improvefiltering effect stabilityVSAvoidgain accuracy
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent makes the clock pulse width dynamic by introducing a programmable pulse width control mechanism. The clock generator can adjust the pulse width of sampling clocks based on process variation compensation needs, transforming a static parameter into a dynamic one that can adapt to manufacturing variations and maintain stable filtering performance.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the pulse width parameter of the sampling clock to compensate for process variations. By adjusting this parameter, the system can correct gain variations and DC offsets caused by manufacturing tolerances, thereby maintaining manufacturing precision without requiring perfect capacitor matching.

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If the pulse width is inversely proportional to input sampling rate, then narrow band CDF causes positive gain variation, but wide band CDF causes gain loss

Engineering Contradiction:
Improvebandwidth adaptabilityVSAvoidgain accuracy
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The patent implements dynamic pulse width adjustment that adapts to different bandwidth requirements. The system can programmably change the pulse width based on whether narrow band or wide band operation is needed, allowing the CDF to maintain optimal gain accuracy across different operating conditions and bandwidth configurations.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent uses parameter changes in pulse width to compensate for gain variations in different bandwidth scenarios. By adjusting the pulse width parameter according to the specific bandwidth requirement, the system can prevent both positive gain variation in narrow band and gain loss in wide band operations.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If the clock generator uses fixed phase differences, then the filtering effect is stable, but variable bandwidth cannot be achieved

Engineering Contradiction:
Improvefiltering effect stabilityVSAvoidbandwidth variability
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent introduces dynamic phase difference adjustment capability in the clock generator. By making the phase differences between sampling clocks programmable and adjustable, the system can achieve variable bandwidth operation while maintaining stable filtering effects through controlled phase relationships.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS8558607B2Charge-domain filter and method thereof
Publication Date: 2013.10.15 IND TECH RES INST
  • US8558607B2 patent drawing
  • US8558607B2 patent drawing
  • US8558607B2 patent drawing

AI summary

A charge domain filter (CDF) is provided. The CDF includes a switched-capacitor network (SCN) and a clock generator. An input of the SCN receives an input signal. The SCN samples the input signal according to clock signals with different phases. The clock generator is coupled to the SCN for providing the clock signals. The clock generator adjusts phase differences of the clock signals or pulse widths of the clock signals in accordance with a control signal.