CDR Circuitry for Auto-Speed Negotiation Across Serial Data Rates

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Solution Overview

Problem

Existing clock and data recovery (CDR) circuitries in integrated circuits face challenges in supporting a wide range of high-speed serial data communication protocols and auto-speed negotiation, as they are typically optimized for specific frequency and data rate standards, limiting their adaptability and flexibility.

Innovation Solution

The CDR circuitry includes controllable frequency scaling elements and separate control circuitry to dynamically adjust frequency and phase scaling, allowing it to operate across multiple protocols and data rates without reprogramming, and supports auto-speed negotiation by monitoring data changes to adjust its operation accordingly.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If CDR circuitry is optimized for specific frequency and data rate standards, then it achieves high performance for that standard, but it loses adaptability to support multiple protocols and auto-speed negotiation

Engineering Contradiction:
ImproveCDR performanceVSAvoidprotocol support
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent implements dynamic frequency scaling by making the frequency scaling factor controllable and adjustable based on the detected data rate. The circuit transitions from static optimization to dynamic adaptation, allowing the same hardware to achieve optimal performance across multiple protocols (PCIE Gen1, Gen2, Gen3, QPI) by adjusting scaling factors in real-time according to the communication standard being used.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The invention changes the operating parameters of the CDR circuitry by introducing controllable frequency scaling factors that can be adjusted to match different data rates. By modifying the frequency scaling parameter based on detected communication standards, the circuit maintains high performance across multiple protocols without requiring separate dedicated circuits for each standard.

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If CDR circuitry supports a wide range of data rates through multiple protocols, then it increases adaptability, but it requires reprogramming or resetting to switch between protocols

Engineering Contradiction:
Improveprotocol supportVSAvoidreprogramming time
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The patent implements self-service by enabling the CDR circuitry to automatically detect the communication standard being used and autonomously adjust its frequency scaling factors without external intervention. The circuit monitors incoming data signals, identifies the protocol type, and dynamically reconfigures itself, eliminating the need for manual reprogramming or resetting when switching between protocols.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The invention incorporates feedback mechanisms where the CDR circuitry continuously monitors the incoming data stream characteristics to detect which communication standard is active. Based on this feedback information, the circuit automatically adjusts its operating parameters, creating a closed-loop system that adapts in real-time without requiring external control signals or reprogramming operations.

Inventive Principle:
Principle #23Feedback

3Adaptability or versatility

If frequency scaling is made controllable to support multiple protocols, then adaptability improves, but circuit complexity increases

Engineering Contradiction:
Improvedata rate supportVSAvoidcontrol circuitry
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent achieves multi-functionality by designing a universal CDR circuit architecture that can handle multiple protocols through a single controllable frequency scaling mechanism. Rather than implementing separate dedicated circuits for each protocol, the invention uses one adaptable circuit with adjustable scaling factors that serves all protocol requirements, thereby limiting the increase in overall circuit complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentEP2532115B1Clock and data recovery circuitry with auto-speed negotiation and other possible features
Publication Date: 2018.08.15 ALTERA CORP
  • EP2532115B1 patent drawingFigure 1
  • EP2532115B1 patent drawingFigure 2
  • EP2532115B1 patent drawingFigure 3

AI summary

An integrated circuit ("IC") may include clock and data recovery ("CDR") circuitry for recovering data information from an input serial data signal. The CDR circuitry may include a reference clock loop and a data loop. A retimed (recovered) data signal output by the CDR circuitry is monitored by other control circuitry on the IC for a communication change request contained in that signal. Responsive to such a request, the control circuitry can change an operating parameter of the CDR circuitry (e.g., a frequency division factor used in either of the above-mentioned loops). This can help the IC support communication protocols that employ auto-speed negotiation.