CDR Phase Detector Calibration for Static Phase Offset Correction
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Solution Overview
Problem
Existing clock and data recovery (CDR) circuits face sub-optimal performance due to static phase errors caused by linear phase detectors, which are difficult to calibrate accurately and require complex circuits, leading to degraded performance especially when dealing with data streams having significant jitter.
Innovation Solution
A dual-purpose phase detector configuration using both linear and bang-bang phase detectors to calibrate the CDR circuit, where the bang-bang phase detector determines the phase relationship and adjusts the linear phase detector parameters to eliminate static phase errors, allowing for accurate alignment of the sampling clock with the data sequence.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a linear phase detector is used in the CDR circuit, then charge pump activity and timing jitter are reduced, but static phase errors are introduced due to finite gain and component delays
Solution Approach 1:
A delay element is introduced as an intermediary component between the linear phase detector output and the charge pump input. This delay element is calibrated to compensate for the static phase error introduced by the linear phase detector, effectively canceling out the phase misalignment while preserving the low jitter characteristics of the linear detector
Solution Approach 2:
The delay parameter of the added delay element is calibrated to a specific value that compensates for the static phase error. By adjusting this parameter, the system transforms the phase error characteristic while maintaining the beneficial low jitter performance
2Measurement precision
If calibration is performed to correct static phase error in the linear phase detector, then phase alignment accuracy is improved, but circuit complexity increases due to additional calibration components
Solution Approach 1:
The calibration function is extracted as a separate, dedicated delay element rather than being integrated into the main phase detector circuitry. This allows the calibration function to be implemented with a simple, isolated component that can be calibrated independently without complicating the core CDR circuit
Solution Approach 2:
The delay element is pre-calibrated to a specific value that compensates for the known static phase error of the linear phase detector. This preliminary calibration is performed once during manufacturing or initialization, eliminating the need for continuous complex calibration operations during normal circuit operation
Data Source
AI summary
A method for calibrating a clock and data recovery circuit may include configuring a phase detector as a bang-bang phase detector. The bang-bang phase detector may be used to determine a phase difference between a sampling clock provided by an interpolator and a calibration signal. The phase detector may also be configured as a linear phase detector. While using the linear phase detector, a linear phase detector parameter may be adjusted such that the phase difference between the calibration signal and the sampling clock is zero, while keeping the phase of the sampling clock fixed.